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/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Druntime-loop-at-most-two-exits.ll6 ; ENABLED-LABEL: @test(
7 ; ENABLED-NEXT: entry:
13 ; ENABLED: entry.new:
16 ; ENABLED: header:
22 ; ENABLED: for.body:
30 ; ENABLED: for.body.1:
38 ; ENABLED: for.body.2:
46 ; ENABLED: for.body.3:
54 ; ENABLED: for.body.4:
62 ; ENABLED: for.body.5:
[all …]
H A Druntime-multiexit-heuristic.ll171 ; ENABLED-LABEL: @test1(
172 ; ENABLED-NEXT: entry:
181 ; ENABLED: header:
189 ; ENABLED: latch:
392 ; ENABLED-LABEL: @test2(
393 ; ENABLED-NEXT: entry:
410 ; ENABLED: latch:
613 ; ENABLED-NEXT: entry:
622 ; ENABLED: latch:
713 ; ENABLED-NEXT: entry:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dsupernode.ll9 ; ENABLED-NEXT: entry:
30 ; ENABLED-NEXT: ret void
66 ; ENABLED-NEXT: entry:
87 ; ENABLED-NEXT: ret void
124 ; ENABLED-NEXT: entry:
145 ; ENABLED-NEXT: ret void
205 ; ENABLED-NEXT: entry:
226 ; ENABLED-NEXT: ret void
274 ; ENABLED-NEXT: entry:
286 ; ENABLED: bb:
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BtVer2/
H A Dinstruction-info-view.s14 # ENABLED: Iterations: 100
15 # ENABLED-NEXT: Instructions: 300
16 # ENABLED-NEXT: Total Cycles: 211
17 # ENABLED-NEXT: Total uOps: 300
20 # ENABLED: Dispatch Width: 2
25 # ENABLED: Instruction Info:
26 # ENABLED-NEXT: [1]: #uOps
27 # ENABLED-NEXT: [2]: Latency
28 # ENABLED-NEXT: [3]: RThroughput
29 # ENABLED-NEXT: [4]: MayLoad
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BdVer2/
H A Dinstruction-info-view.s14 # ENABLED: Iterations: 100
15 # ENABLED-NEXT: Instructions: 300
16 # ENABLED-NEXT: Total Cycles: 583
17 # ENABLED-NEXT: Total uOps: 700
20 # ENABLED: Dispatch Width: 4
25 # ENABLED: Instruction Info:
26 # ENABLED-NEXT: [1]: #uOps
27 # ENABLED-NEXT: [2]: Latency
28 # ENABLED-NEXT: [3]: RThroughput
29 # ENABLED-NEXT: [4]: MayLoad
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
H A Dvarying-outer-2d-reduction.ll7 ; ENABLED label as the run above:
21 ; ENABLED-NEXT: sub sp, #4
22 ; ENABLED-NEXT: cmp r3, #1
24 ; ENABLED-NEXT: blt .LBB0_8
30 ; ENABLED-NEXT: mov r9, r12
31 ; ENABLED-NEXT: uxth r0, r0
33 ; ENABLED-NEXT: b .LBB0_4
43 ; ENABLED-NEXT: cmp r8, r3
48 ; ENABLED-NEXT: cmp r2, r8
70 ; ENABLED-NEXT: vpstt
[all …]
H A Dtail-pred-disabled-in-loloops.ll11 ; ENABLED-LABEL: check_option:
12 ; ENABLED: @ %bb.0: @ %entry
14 ; ENABLED-NEXT: cmp r3, #1
15 ; ENABLED-NEXT: blt .LBB0_4
20 ; ENABLED-NEXT: mov r12, r0
21 ; ENABLED-NEXT: mov r4, r2
22 ; ENABLED-NEXT: mov r5, r1
23 ; ENABLED-NEXT: mov r6, r3
24 ; ENABLED-NEXT: dlstp.32 lr, r6
32 ; ENABLED-NEXT: letp lr, .LBB0_3
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dint-to-fp-no-neon.ll14 ; NEON-ENABLED-NEXT: ret
32 ; NEON-ENABLED-NEXT: ret
62 ; NEON-ENABLED-NEXT: ret
80 ; NEON-ENABLED-NEXT: ret
110 ; NEON-ENABLED-NEXT: ret
128 ; NEON-ENABLED-NEXT: ret
158 ; NEON-ENABLED-NEXT: ret
215 ; NEON-ENABLED-NEXT: ret
247 ; NEON-ENABLED-NEXT: ret
266 ; NEON-ENABLED-NEXT: ret
[all …]
H A Dmovid-no-neon.ll6 ; NEON-ENABLED-LABEL: get_float:
7 ; NEON-ENABLED: // %bb.0:
8 ; NEON-ENABLED-NEXT: movi d0, #0000000000000000
9 ; NEON-ENABLED-NEXT: ret
19 ; NEON-ENABLED-LABEL: get_double:
20 ; NEON-ENABLED: // %bb.0:
21 ; NEON-ENABLED-NEXT: movi d0, #0000000000000000
22 ; NEON-ENABLED-NEXT: ret
32 ; NEON-ENABLED-LABEL: get_half:
33 ; NEON-ENABLED: // %bb.0:
[all …]
H A Dfabd-no-neon.ll15 ; NEON-ENABLED-LABEL: fabd16:
16 ; NEON-ENABLED: // %bb.0:
17 ; NEON-ENABLED-NEXT: fabd h0, h0, h1
18 ; NEON-ENABLED-NEXT: ret
31 ; NEON-ENABLED-LABEL: fabd32:
32 ; NEON-ENABLED: // %bb.0:
33 ; NEON-ENABLED-NEXT: fabd s0, s0, s1
34 ; NEON-ENABLED-NEXT: ret
47 ; NEON-ENABLED-LABEL: fabd64:
48 ; NEON-ENABLED: // %bb.0:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dlea-opt.ll12 ; ENABLED-LABEL: test1:
27 ; ENABLED-NEXT: retq
32 ; ENABLED-NEXT: retq
85 ; ENABLED-LABEL: test2:
100 ; ENABLED-NEXT: retq
105 ; ENABLED-NEXT: retq
162 ; ENABLED-LABEL: test3:
178 ; ENABLED-NEXT: retq
183 ; ENABLED-NEXT: retq
239 ; ENABLED-LABEL: test4:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/
H A Dgisel-commandline-option.ll24 ; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix NOFALLBACK --check-prefix ENABLED-O1
29 ; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix FALLBACK --check-prefix ENABLED-O1
34 ; RUN: | FileCheck %s --check-prefix ENABLED --check-prefix ENABLED-O1
59 ; ENABLED: IRTranslator
64 ; ENABLED-O1-NEXT: PreLegalizerCombiner
67 ; ENABLED-O1-NEXT: LoadStoreOpt
69 ; ENABLED-NEXT: Legalizer
71 ; ENABLED: RegBankSelect
73 ; ENABLED-NEXT: Localizer
78 ; ENABLED-NEXT: InstructionSelect
[all …]
H A Dprelegalizercombiner-copy-prop-disabled.mir3 … | FileCheck --check-prefix=ENABLED %s
10 # RUN: | FileCheck --check-prefix=ENABLED %s
13 # RUN: | FileCheck --check-prefix=ENABLED %s
31 ; ENABLED-LABEL: name: test_copy
32 ; ENABLED: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
33 ; ENABLED: $x0 = COPY [[COPY]](p0)
/llvm-project-15.0.7/llvm/test/Transforms/LICM/
H A Dhoist-phi.ll19 ; CHECK-ENABLED: [[IF_LICM]]:
23 ; CHECK-ENABLED: [[THEN_LICM]]:
61 ; CHECK-ENABLED: [[IF_LICM]]:
65 ; CHECK-ENABLED: [[ELSE_LICM]]:
69 ; CHECK-ENABLED: [[THEN_LICM]]
112 ; CHECK-ENABLED: [[IF_LICM]]:
256 ; CHECK-ENABLED: [[IF_LICM]]:
290 ; CHECK-ENABLED: [[IF_LICM]]:
330 ; CHECK-ENABLED: [[IF_LICM]]:
362 ; CHECK-ENABLED: [[IF_LICM]]:
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Da15-SD-dep.ll7 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
16 ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0]
25 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
34 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0]
47 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
48 ; CHECK-ENABLED: vadd.f32
49 ; CHECK-ENABLED-NEXT: bx lr
62 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
63 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[1]
64 ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d{{[0-9]*}}[0]
[all …]
H A Dipra.ll2 …iple armv7a--none-eabi < %s -enable-ipra | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLED
41 ; ENABLED-NOT: r3
44 ; ENABLED-NOT: r3
119 ; ENABLED-NOT: s0
122 ; ENABLED-NOT: s0
149 ; ENABLED-NOT: d0
152 ; ENABLED-NOT: d0
/llvm-project-15.0.7/llvm/test/DebugInfo/Generic/
H A Dextended-loc-directive.ll2 …bose=0 -O0 -dwarf-extended-loc=Enable < %s | FileCheck %s --check-prefix ENABLED --check-prefix CH…
18 ; ENABLED: .loc 1 3 3 prologue_end{{$}}
21 ; ENABLED: .loc 1 3 9 is_stmt 0{{$}}
26 ; ENABLED: .loc 1 4 3 is_stmt 1{{$}}
29 ; ENABLED: .loc 1 4 9 is_stmt 0{{$}}
34 ; ENABLED: .loc 1 5 1 is_stmt 1{{$}}
/llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/
H A Dlive-debug-values-cutoffs.mir19 # RUN: | FileCheck %s -check-prefix=LDV-ENABLED
24 # RUN: | FileCheck %s -check-prefix=LDV-ENABLED
30 # RUN: | FileCheck %s -check-prefix=LDV-ENABLED
35 # RUN: | FileCheck %s -check-prefix=LDV-ENABLED
41 # RUN: | FileCheck %s -check-prefix=LDV-ENABLED
46 # RUN: | FileCheck %s -check-prefix=LDV-ENABLED
51 # LDV-ENABLED-LABEL: bb.1.exit
52 # LDV-ENABLED-NEXT: DBG_VALUE $rsp, 0, {{.*}}, !DIExpression(DW_OP_plus_uconst, 4)
53 # LDV-ENABLED-NEXT: $edi = MOV32rm
/llvm-project-15.0.7/mlir/include/mlir/IR/
H A DMLIRContext.h57 enum class Threading { DISABLED, ENABLED }; enumerator
59 explicit MLIRContext(Threading multithreading = Threading::ENABLED);
61 Threading multithreading = Threading::ENABLED);
/llvm-project-15.0.7/lld/test/COFF/
H A Dlto-new-pass-manager.ll4 …try:main -opt:ltonewpassmanager -opt:ltodebugpassmanager 2>&1 | FileCheck %s --check-prefix=ENABLED
5 ; ENABLED: Running pass: InstCombinePass
/llvm-project-15.0.7/llvm/test/BugPoint/
H A Dfunc-attrs.ll2 ; RUN: llvm-dis %t-reduced-simplified.bc -o - | FileCheck -check-prefixes=ALL,ENABLED %s
13 ; ENABLED: attributes #[[ATTRS]] = { "bugpoint-crash" }
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dsms-remark.ll4 ; RUN: | FileCheck %s --check-prefix=ENABLED
14 ;ENABLED: Schedule found with Initiation Interval
15 ;ENABLED: Pipelined succesfully!
/llvm-project-15.0.7/clang/tools/scan-build-py/tests/unit/
H A Dtest_intercept.py63 ENABLED = 'enabled'
73 create_csrutil(tmpdir, ENABLED)
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dprep-diag11-include.inc1 #ifdef ENABLED
H A Dprep-diag12-include.inc1 #ifdef ENABLED

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