Home
last modified time | relevance | path

Searched refs:DispatchID (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUArgumentUsageInfo.cpp70 << " DispatchID: " << FI.second.DispatchID in print()
127 return std::make_tuple(DispatchID ? &DispatchID : nullptr, in getPreloadedValue()
163 AI.DispatchID = ArgDescriptor::createRegister(AMDGPU::SGPR10_SGPR11); in fixedABILayout()
H A DSIMachineFunctionInfo.cpp41 DispatchID(false), in SIMachineFunctionInfo()
146 DispatchID = true; in SIMachineFunctionInfo()
248 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
251 return ArgInfo.DispatchID.getRegister(); in addDispatchID()
572 Any |= convertArg(AI.DispatchID, ArgInfo.DispatchID); in convertArgumentInfo()
H A DSIMachineFunctionInfo.h186 Optional<SIArgument> DispatchID;
211 YamlIO.mapOptional("dispatchID", AI.DispatchID);
415 bool DispatchID : 1;
689 return DispatchID;
H A DAMDGPUArgumentUsageInfo.h129 ArgDescriptor DispatchID; member
H A DAMDGPUTargetMachine.cpp1578 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchID, in parseMachineFunctionInfo()
1579 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchID, in parseMachineFunctionInfo()
H A DSIISelLowering.cpp2053 allocateSGPR64Input(CCInfo, ArgInfo.DispatchID); in allocateSpecialInputSGPRs()