| /llvm-project-15.0.7/llvm/docs/tutorial/ |
| H A D | BuildingAJIT4.rst | 23 **(1) Describe the drawbacks of JITing from IR (have to compile to IR first,
26 **(2) Describe CompileCallbackManagers and IndirectStubManagers in detail.**
|
| /llvm-project-15.0.7/clang/lib/Tooling/Transformer/ |
| H A D | Stencil.cpp | 107 Describe, enumerator
137 case UnaryNodeOperator::Describe: in toString()
148 if (Op == UnaryNodeOperator::Describe) in eval()
200 case UnaryNodeOperator::Describe: in eval()
463 return std::make_shared<UnaryOperationStencil>(UnaryNodeOperator::Describe, in describe()
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVRegisterBanks.td | 1 //=-- RISCVRegisterBank.td - Describe the RISCV Banks --------*- tablegen -*-=//
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMRegisterBanks.td | 1 //=- ARMRegisterBank.td - Describe the AArch64 Banks ---------*- tablegen -*-=//
|
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCRegisterBanks.td | 1 //===-- PPCRegisterBanks.td - Describe the PPC Banks -------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86RegisterBanks.td | 1 //=- X86RegisterBank.td - Describe the X86 Banks -------------*- tablegen -*-=//
|
| /llvm-project-15.0.7/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kRegisterBanks.td | 1 //===-- M68kRegisterBanks.td - Describe the M68k Banks -----*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterBanks.td | 1 //=- AArch64RegisterBank.td - Describe the AArch64 Banks -----*- tablegen -*-=//
|
| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVRegisterBanks.td | 1 //===-- SPIRVRegisterBanks.td - Describe SPIR-V RegBanks ---*- tablegen -*-===//
|
| H A D | SPIRV.td | 1 //===-- SPIRV.td - Describe the SPIR-V Target Machine ------*- tablegen -*-===//
|
| H A D | SPIRVEnums.td | 1 //===-- SPIRVEnums.td - Describe SPIRV Enum Operands -------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/docs/ |
| H A D | MIRLangRef.rst | 346 .. TODO: Describe the way the reference to an unnamed LLVM IR block can be
510 .. TODO: Describe the FPIMM immediate operands.
785 .. TODO: Describe the syntax for virtual register YAML definitions.
786 .. TODO: Describe the machine function's YAML flag attributes.
787 .. TODO: Describe the syntax for the register mask machine operands.
788 .. TODO: Describe the frame information YAML mapping.
789 .. TODO: Describe the syntax of the stack object machine operands and their
791 .. TODO: Describe the syntax of the block address machine operands.
792 .. TODO: Describe the syntax of the metadata machine operands, and the
794 .. TODO: Describe the syntax of the register live out machine operands.
[all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/ARC/ |
| H A D | ARC.td | 1 //===- ARC.td - Describe the ARC Target Machine ------------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegisterBanks.td | 1 //=- AMDGPURegisterBank.td - Describe the AMDGPU Banks -------*- tablegen -*-=//
|
| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCore.td | 1 //===-- XCore.td - Describe the XCore Target Machine -------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | Lanai.td | 1 //===- Lanai.td - Describe the Lanai Target Machine --------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/DirectX/ |
| H A D | DirectX.td | 1 //- DirectX.td - Describe the DirectX Target Machine ----------*- tablegen -*-//
|
| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVR.td | 1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/BPF/ |
| H A D | BPF.td | 1 //===-- BPF.td - Describe the BPF Target Machine -----------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VE.td | 1 //===-- VE.td - Describe the VE Target Machine -------------*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZ.td | 1 //===-- SystemZ.td - Describe the SystemZ target machine -----*- tblgen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/MSP430/ |
| H A D | MSP430.td | 1 //===-- MSP430.td - Describe the MSP430 Target Machine -----*- tablegen -*-===//
|
| /llvm-project-15.0.7/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrFormats.td | 10 // Describe NVPTX instructions format
|
| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | LeonFeatures.td | 1 //===-- LeonFeatures.td - Describe the Leon Features -------*- tablegen -*-===//
|
| /llvm-project-15.0.7/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/ |
| H A D | AppleObjCClassDescriptorV2.cpp | 373 bool ClassDescriptorV2::Describe( in Describe() function in ClassDescriptorV2
429 metaclass->Describe( in Describe()
555 descriptor.Describe(nullptr, nullptr, nullptr, [this, process, in fill()
|