Searched refs:DWord (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | ByteStreamer.h | 34 virtual void emitULEB128(uint64_t DWord, const Twine &Comment = "", 49 void emitSLEB128(uint64_t DWord, const Twine &Comment) override { in emitSLEB128() argument 51 AP.emitSLEB128(DWord); in emitSLEB128() 53 void emitULEB128(uint64_t DWord, const Twine &Comment, in emitULEB128() argument 56 AP.emitULEB128(DWord, nullptr, PadTo); in emitULEB128() 78 Hash.addSLEB128(DWord); in emitSLEB128() 80 void emitULEB128(uint64_t DWord, const Twine &Comment, in emitULEB128() argument 82 Hash.addULEB128(DWord); in emitULEB128() 112 unsigned Length = encodeSLEB128(DWord, OSE); in emitSLEB128() 122 void emitULEB128(uint64_t DWord, const Twine &Comment, in emitULEB128() argument [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | README_P9.txt | 349 - Convert (Un)Signed DWord -> QP: xscvsdqp xscvudqp 508 - Load/Store DWord: lxsd stxsd
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| H A D | PPCInstrVSX.td | 1494 // Convert (Un)Signed DWord -> QP. 1666 // Load DWord 1704 // Store DWord 3993 // Convert (Un)Signed DWord in memory -> QP 4357 // (Un)Signed DWord vector extract -> QP 4656 // (Un)Signed DWord vector extract -> QP
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| H A D | PPCInstrInfo.td | 5027 dag DWord = 5046 dag DWord = 5077 (OR8 (RLDICR DWBytes7654.DWord, 32, 31), DWBytes3210.DWord)>;
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| H A D | PPCISelLowering.cpp | 11087 int DWord = Idx >> 1; in LowerFP_EXTEND() local 11091 DWord ^= 0x1; in LowerFP_EXTEND() 11094 Op0.getOperand(0), DAG.getConstant(DWord, dl, MVT::i32)); in LowerFP_EXTEND()
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| /llvm-project-15.0.7/llvm/test/MC/PowerPC/ |
| H A D | vsx.s | 730 # Convert (Un)Signed DWord -> QP 898 # Load/Store DWord
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | f128-vecExtractNconv.ll | 9 ; Vector extract DWord and convert to quad precision.
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15429 for (int DWord = 0; DWord != 4; ++DWord) { in lowerV8I16GeneralSingleInputShuffle() local 15430 int M0 = Mask[2 * DWord + 0]; in lowerV8I16GeneralSingleInputShuffle() 15431 int M1 = Mask[2 * DWord + 1]; in lowerV8I16GeneralSingleInputShuffle() 15444 PSHUFDMask[DWord] = DOffset + j; in lowerV8I16GeneralSingleInputShuffle() 15450 PSHUFDMask[DWord] = DOffset + DWordPairs.size(); in lowerV8I16GeneralSingleInputShuffle() 15549 auto FixFlippedInputs = [&V, &DL, &Mask, &DAG](int PinnedIdx, int DWord, in lowerV8I16GeneralSingleInputShuffle() 15556 int FixFreeIdx = 2 * (DWord ^ (PinnedIdx / 2 == DWord)); in lowerV8I16GeneralSingleInputShuffle()
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