Searched refs:DPP64 (Results 1 – 3 of 3) sorted by relevance
1 …arch=amdgcn -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,DPP64,GFX90A2 …ch=amdgcn -mcpu=gfx940 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,DPP64,DPPMOV648 ; DPP64: v_ceil_f64_dpp [[V]], [[V]] row_newbcast:1 row_mask:0xf bank_mask:0xf bound_ctrl:1…24 ; DPP64: v_rcp_f64_dpp [[V]], [[V]] row_newbcast:1 row_mask:0xf bank_mask:0xf bound_ctrl:1{…
40 # DPP64 does not support all control values and must be split to become legal
154 int DPP64 = -1; in getDPPOp() local156 DPP64 = AMDGPU::getDPPOp64(Op); in getDPPOp()157 if (DPP64 != -1 && TII->pseudoToMCOpcode(DPP64) != -1) in getDPPOp()158 return DPP64; in getDPPOp()