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Searched refs:DDIV (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips64r6InstrInfo.td141 def DDIV : DDIV_ENC, DDIV_DESC, ISA_MIPS64R6;
H A DMipsScheduleGeneric.td267 def : InstRW<[GenericWriteDIV], (instrs DDIV, DMOD)>;
H A DMipsISelLowering.cpp1423 case Mips::DDIV: in EmitInstrWithCustomInserter()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp1192 DanglingDebugInfoVector &DDIV = DDIMI.second; in dropDanglingDebugInfo() local
1196 for (auto &DDI : DDIV) in dropDanglingDebugInfo()
1200 erase_if(DDIV, isMatchingDbgValue); in dropDanglingDebugInfo()
1212 DanglingDebugInfoVector &DDIV = DanglingDbgInfoIt->second; in resolveDanglingDebugInfo() local
1213 for (auto &DDI : DDIV) { in resolveDanglingDebugInfo()
1258 DDIV.clear(); in resolveDanglingDebugInfo()
/llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2082 case Mips::DDIV: in processInstruction()