| /llvm-project-15.0.7/clang/test/CXX/special/class.dtor/ |
| H A D | p5-0x.cpp | 106 struct D5 : D1 { struct 107 ~D5(); // ok (but not definable) 109 D5::~D5() {} // expected-error {{'operator delete' is a private member of 'D1'}} in ~D5()
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| /llvm-project-15.0.7/clang/test/CodeGenCXX/ |
| H A D | homogeneous-aggregates.cpp | 40 struct D5 : I1, I2, I3 {}; // homogeneous aggregate struct 64 D5 CC func_D5(D5 x) { return x; } in func_D5() 75 void call_D5(D5 *p) { in call_D5()
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| /llvm-project-15.0.7/llvm/unittests/Support/ |
| H A D | AlignOfTest.cpp | 56 struct D5 : S3 { char c; }; argument 59 struct D8 : S1, D4, D5 { double x[2]; }; 160 EXPECT_EQ(alignof(D5), alignof(AlignedCharArrayUnion<D5>)); in TEST() 215 EXPECT_EQ(sizeof(D5), sizeof(AlignedCharArrayUnion<D5>)); in TEST()
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/infrastructure/ |
| H A D | nolintnextline.cpp | 28 class D5 { D5(int i); }; class
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| H A D | nolint.cpp | 124 class D5 { D5(int x); }; // NOLINT(google*,-google*) class
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| /llvm-project-15.0.7/clang/test/SemaCXX/ |
| H A D | warn-cast-align.cpp | 100 struct D5 : virtual D0 { struct 107 struct D6 : virtual D5 { argument 165 a = (A *)(static_cast<D5 *>(&t9)); // expected-warning {{cast from 'D5 *' to 'A *'}} in test2()
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | ConcatenatedSubregs.td | 56 def D5 : MyReg<"d5", [S10, S11]>; 88 // CHECK: Regs: D0 D1 D2 D3 D4 D5 D6 D7 S1_S2 S3_S4 S5_S6 S7_S8 S9_S10 S11_S12 S13_S14 115 // CHECK-NEXT: SubReg ssub1_ssub2 = D5 126 // CHECK-NEXT: SubReg sub0 = D5
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| H A D | BitsInit.td | 35 bits<1> D5 = { 0 }; // ok 74 // CHECK: bits<1> D5 = { 0 };
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| /llvm-project-15.0.7/clang/test/CXX/special/class.copy/ |
| H A D | p23-cxx11.cpp | 115 struct D5 { struct 134 template struct CopyAssign<D5>; // expected-note {{here}} argument
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | 2013-04-16-AAPCS-C5-vs-VFP.ll | 28 double %p5, ; --> D5 53 double 23.5, ; --> D5
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| H A D | 2013-04-16-AAPCS-C4-vs-VFP.ll | 69 double %p5, ; --> D5 88 double 23.5, ; --> D5
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| H A D | 2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll | 13 double %vfp5, ; --> D5, NSAA=SP
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| H A D | 2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll | 15 double %vfp5, ; --> D5, NSAA=SP
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| /llvm-project-15.0.7/llvm/test/Instrumentation/HWAddressSanitizer/ |
| H A D | prologue.ll | 84 ; CHECK-HISTORY-TLS: %[[D5:[^ ]*]] = and i64 %[[D4]], %[[D3]] 85 ; CHECK-HISTORY-TLS-SLOT: store i64 %[[D5]], i64* %[[C]] 86 ; CHECK-HISTORY-HWASAN-TLS: store i64 %[[D5]], i64* @__hwasan_tls
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| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | warn-duplicate-enum.c | 26 D5 = 2 // expected-note {{element 'D5' also has value 2}} enumerator
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| /llvm-project-15.0.7/mlir/test/Dialect/Linalg/ |
| H A D | parallel-loops.mlir | 91 // CHECK-DAG: %[[D5:.*]] = memref.dim %{{.*}}, %c5 95 // CHECK: scf.for %[[IV5:.*]] = %[[C0]] to %[[D5]] step %[[C1]]
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| H A D | convert-elementwise-to-linalg.mlir | 100 // CHECK: %[[D5:.*]] = tensor.dim %[[ARG0]], %[[C5]] : tensor<4x?x?x8x2x?xf32> 101 …// CHECK: %[[INIT:.*]] = linalg.init_tensor [4, %[[D1]], %[[D2]], 8, 2, %[[D5]]] : tensor<4x?x?x8x…
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| /llvm-project-15.0.7/llvm/test/MC/MachO/ |
| H A D | x86_64-symbols.s | 20 D5: label
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| H A D | x86_32-symbols.s | 20 D5: label
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| /llvm-project-15.0.7/llvm/test/CodeGen/M68k/ |
| H A D | reserved-regs.ll | 13 ; RUN: llc -mtriple=m68k -mattr="+reserve-d5" < %s | FileCheck --check-prefix=D5 %s 62 ; D5-NOT: %d5
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kBaseInfo.h | 219 return M68k::D5; in getMaskedSpillRegister()
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/fuchsia/ |
| H A D | multiple-inheritance.cpp | 110 struct D5 : V7, V8 {}; struct
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64CallingConvention.td | 105 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, 107 CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, 142 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, 144 CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, 216 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, 218 CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>, 304 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>
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| /llvm-project-15.0.7/lldb/test/Shell/ScriptInterpreter/Python/Crashlog/Inputs/ |
| H A D | a.out.crash | 13 Anonymous UUID: DCEF35CB-68D5-F524-FF13-060901F52EA8
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | aix-bytestring.ll | 4 …BC\BD\BE\BF\C0\C1\C2\C3\C4\C5\C6\C7\C8\C9\CA\CB\CC\CD\CE\CF\D0\D1\D2\D3\D4\D5\D6\D7\D8\D9\DA\DB\DC…
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