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/llvm-project-15.0.7/clang/test/CXX/special/class.copy/
H A Dp23-cxx11.cpp111 struct D4 { struct
112 …D4 &operator=(D4 &&) = default; // expected-note {{here}} expected-note {{copy assignment operator…
132 template struct MoveAssign<D4>; // expected-note {{here}} argument
133 template struct MoveOrCopyAssign<D4>; // expected-note {{here}}
/llvm-project-15.0.7/clang/test/CXX/class/class.mem/
H A Dp13.cpp83 union { int D4; }; member
99 struct D4 : B { using B::D4; }; // expected-error {{member 'D4' has the same name as its class}} struct
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dhomogeneous-aggregates.cpp33 struct D4 : Base2, Base3 { // homogeneous aggregate struct
62 D4 CC func_D4(D4 x) { return x; } in func_D4()
/llvm-project-15.0.7/llvm/unittests/Support/
H A DAlignOfTest.cpp55 struct D4 : S2 { int x; }; struct
59 struct D8 : S1, D4, D5 { double x[2]; };
159 EXPECT_EQ(alignof(D4), alignof(AlignedCharArrayUnion<D4>)); in TEST()
214 EXPECT_EQ(sizeof(D4), sizeof(AlignedCharArrayUnion<D4>)); in TEST()
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/infrastructure/
H A Dnolintnextline.cpp25 class D4 { D4(int i); }; class
H A Dnolint.cpp122 class D4 { D4(int x); }; // NOLINT(-explicit-constructor) class
/llvm-project-15.0.7/clang/test/CXX/special/class.dtor/
H A Dp5-0x.cpp102 struct D4 { // expected-note {{virtual destructor requires an unambiguous, accessible 'operator del… struct
103 virtual ~D4() = default; // expected-note {{implicitly deleted here}}
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dsize.td56 // CHECK: def D4 {
70 def D4 : D<(op "string", 42, (op "sub-dag"), D0.Val)>;
H A DBitsInit.td34 bits<3> D4 = { 0b00 }; // type mismatch. RHS doesn't have enough bits
73 // CHECK: bits<3> D4;
H A DConcatenatedSubregs.td55 def D4 : MyReg<"d4", [S8, S9]>;
88 // CHECK: Regs: D0 D1 D2 D3 D4 D5 D6 D7 S1_S2 S3_S4 S5_S6 S7_S8 S9_S10 S11_S12 S13_S14
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A D2013-04-16-AAPCS-C5-vs-VFP.ll27 double %p4, ; --> D4
52 double 23.4, ; --> D4
H A D2013-04-16-AAPCS-C4-vs-VFP.ll68 double %p4, ; --> D4
87 double 23.4, ; --> D4
H A D2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP2.ll12 double %vfp4, ; --> D4, NSAA=SP
H A D2013-05-02-AAPCS-ByVal-Structs-C4-C5-VFP.ll14 double %vfp4, ; --> D4, NSAA=SP
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dcomplex-branch-structure.ll120 br i1 %C3.cmp, label %D2, label %D4
133 D4:
134 %val.D4 = load float, float* %D
135 store float %val.D4, float* %D
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Dwarn-cast-align.cpp97 struct __attribute__((aligned(16))) D4 : virtual D2 { struct
126 D4 t8; in test2()
/llvm-project-15.0.7/clang/test/Sema/
H A Dwarn-duplicate-enum.c25 D4 = D2, // no warning enumerator
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dparallel-loops.mlir90 // CHECK-DAG: %[[D4:.*]] = memref.dim %{{.*}}, %c4
94 // CHECK: scf.parallel (%[[IV3:.*]], %[[IV4:.*]]) = (%[[C0]], %[[C0]]) to (%[[D3]], %[[D4…
/llvm-project-15.0.7/llvm/test/MC/MachO/
H A Dx86_64-symbols.s17 D4: label
H A Dx86_32-symbols.s17 D4: label
/llvm-project-15.0.7/llvm/test/CodeGen/M68k/
H A Dreserved-regs.ll12 ; RUN: llc -mtriple=m68k -mattr="+reserve-d4" < %s | FileCheck --check-prefix=D4 %s
61 ; D4-NOT: %d4
/llvm-project-15.0.7/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kBaseInfo.h217 return M68k::D4; in getMaskedSpillRegister()
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Damdpal-usersgpr-init.ll12 …D\00\A8.shaders\81\A8.compute\82\B0.api_shader_hash\92\CF\D3s\A6\8D\C5x\84\D4\00\B1.hardware_mappi…
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/fuchsia/
H A Dmultiple-inheritance.cpp105 struct D4 : V5, V6 {}; struct
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64CallingConvention.td105 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
107 CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
142 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
144 CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
216 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
218 CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
304 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>

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