| /llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64GlobalISelUtils.cpp | 100 const CmpInst::Predicate P, AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC() argument
107 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
110 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC()
113 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC()
116 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
119 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC()
122 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
126 CondCode = AArch64CC::VC; in changeFCMPPredToAArch64CC()
129 CondCode = AArch64CC::VS; in changeFCMPPredToAArch64CC()
132 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
[all …]
|
| H A D | AArch64GlobalISelUtils.h | 63 AArch64CC::CondCode &CondCode,
64 AArch64CC::CondCode &CondCode2);
74 AArch64CC::CondCode &CondCode,
75 AArch64CC::CondCode &CondCode2,
|
| H A D | AArch64InstructionSelector.cpp | 1277 AArch64CC::CondCode &CondCode, in changeFPCCToORAArch64CC() argument
1284 CondCode = AArch64CC::EQ; in changeFPCCToORAArch64CC()
1287 CondCode = AArch64CC::GT; in changeFPCCToORAArch64CC()
1290 CondCode = AArch64CC::GE; in changeFPCCToORAArch64CC()
1293 CondCode = AArch64CC::MI; in changeFPCCToORAArch64CC()
1296 CondCode = AArch64CC::LS; in changeFPCCToORAArch64CC()
1299 CondCode = AArch64CC::MI; in changeFPCCToORAArch64CC()
1303 CondCode = AArch64CC::VC; in changeFPCCToORAArch64CC()
1334 AArch64CC::CondCode &CondCode, in changeFPCCToANDAArch64CC() argument
4817 AArch64CC::CondCode Predicate, AArch64CC::CondCode OutCC, in emitConditionalComparison()
[all …]
|
| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 1424 enum CondCode { enum
1457 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
1463 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
1469 inline bool isIntEqualitySetCC(CondCode Code) { in isIntEqualitySetCC()
1476 inline bool isTrueWhenEqual(CondCode Cond) { return ((int)Cond & 1) != 0; } in isTrueWhenEqual()
1481 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
1487 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1501 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1506 CondCode getSetCCSwappedOperands(CondCode Operation);
1511 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
[all …]
|
| H A D | Analysis.h | 96 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
100 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
104 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
108 ICmpInst::Predicate getICmpCondCode(ISD::CondCode Pred);
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ConditionOptimizer.cpp | 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
230 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
244 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
275 AArch64CC::CondCode Cmp; in modifyCmp()
304 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
308 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
318 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
375 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
[all …]
|
| H A D | AArch64SpeculationHardening.cpp | 154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode() argument
235 .addImm(CondCode); in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
249 if (!endsWithCondControlFlow(MBB, TBB, FBB, CondCode)) { in instrumentControlFlow()
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow()
268 insertTrackingCode(*SplitEdgeTBB, CondCode, DL); in instrumentControlFlow()
|
| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VE.h | 40 enum CondCode { enum
83 inline static const char *VECondCodeToString(VECC::CondCode CC) { in VECondCodeToString()
112 inline static VECC::CondCode stringToVEICondCode(StringRef S) { in stringToVEICondCode()
113 return StringSwitch<VECC::CondCode>(S) in stringToVEICondCode()
126 inline static VECC::CondCode stringToVEFCondCode(StringRef S) { in stringToVEFCondCode()
127 return StringSwitch<VECC::CondCode>(S) in stringToVEFCondCode()
148 inline static unsigned VECondCodeToVal(VECC::CondCode CC) { in VECondCodeToVal()
199 inline static VECC::CondCode VEValToCondCode(unsigned Val, bool IsInteger) { in VEValToCondCode()
|
| H A D | VEISelDAGToDAG.cpp | 28 inline static VECC::CondCode intCondCode2Icc(ISD::CondCode CC) { in intCondCode2Icc()
56 inline static VECC::CondCode fpCondCode2Fcc(ISD::CondCode CC) { in fpCondCode2Fcc()
|
| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiCondCode.h | 10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
|
| H A D | LanaiInstrInfo.cpp | 123 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
352 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
372 LPCC::CondCode CC; in optimizeCompareInstr()
373 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
376 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
520 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
522 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
524 NewMI.addImm(CondCode); in optimizeSelect()
621 LPCC::CondCode BranchCond = in analyzeBranch()
647 LPCC::CondCode BranchCond = in reverseBranchCondition()
[all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/XCore/ |
| H A D | XCoreInstrInfo.cpp | 37 enum CondCode { enum
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
212 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
233 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
298 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
406 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
|
| /llvm-project-15.0.7/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 336 unsigned CondCode; in parseJccInstruction() local
338 CondCode = MSP430CC::COND_NE; in parseJccInstruction()
340 CondCode = MSP430CC::COND_E; in parseJccInstruction()
342 CondCode = MSP430CC::COND_LO; in parseJccInstruction()
344 CondCode = MSP430CC::COND_HS; in parseJccInstruction()
346 CondCode = MSP430CC::COND_N; in parseJccInstruction()
348 CondCode = MSP430CC::COND_GE; in parseJccInstruction()
350 CondCode = MSP430CC::COND_L; in parseJccInstruction()
352 CondCode = MSP430CC::COND_NONE; in parseJccInstruction()
356 if (CondCode == (unsigned)MSP430CC::COND_NONE) in parseJccInstruction()
[all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 38 std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
49 CondCode getCondFromMI(const MachineInstr &MI);
52 CondCode getCondFromBranch(const MachineInstr &MI);
55 CondCode getCondFromSETCC(const MachineInstr &MI);
58 CondCode getCondFromCMov(const MachineInstr &MI);
62 CondCode GetOppositeBranchCondition(CondCode CC);
65 unsigned getVPCMPImmForCond(ISD::CondCode CC);
|
| H A D | X86FlagsCopyLowering.cpp | 102 const DebugLoc &TestLoc, X86::CondCode Cond);
105 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs);
342 static X86::CondCode getCondFromFCMOV(unsigned Opcode) { in getCondFromFCMOV()
740 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs()
758 const DebugLoc &TestLoc, X86::CondCode Cond) { in promoteCondToReg()
770 const DebugLoc &TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg()
798 X86::CondCode Cond = X86::COND_INVALID; in rewriteArithmetic()
853 X86::CondCode Cond = X86::getCondFromCMov(CMovI); in rewriteCMov()
879 X86::CondCode Cond = getCondFromFCMOV(CMovI.getOpcode()); in rewriteFCMov()
921 X86::CondCode Cond = X86::getCondFromBranch(JmpI); in rewriteCondJmp()
[all …]
|
| H A D | X86CmovConversion.cpp | 292 X86::CondCode FirstCC = X86::COND_INVALID, FirstOppCC = X86::COND_INVALID, in collectCmovCandidates()
303 X86::CondCode CC = X86::getCondFromCMov(I); in collectCmovCandidates()
664 X86::CondCode CC = X86::CondCode(X86::getCondFromCMov(MI)); in convertCmovInstsToBranches()
665 X86::CondCode OppCC = X86::GetOppositeBranchCondition(CC); in convertCmovInstsToBranches()
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.h | 30 enum CondCode { enum
40 CondCode getOppositeBranchCondition(CondCode);
50 const MCInstrDesc &getBrCond(RISCVCC::CondCode CC) const;
|
| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kInstrInfo.h | 34 enum CondCode { enum
58 static inline M68k::CondCode GetOppositeBranchCondition(M68k::CondCode CC) { in GetOppositeBranchCondition()
97 static inline unsigned GetCondBranchFromCond(M68k::CondCode CC) { in GetCondBranchFromCond()
132 static inline M68k::CondCode GetCondFromBranchOpc(unsigned Opcode) { in GetCondFromBranchOpc()
|
| H A D | M68kISelLowering.cpp | 1493 static M68k::CondCode TranslateIntegerM68kCC(ISD::CondCode SetCCOpcode) { in TranslateIntegerM68kCC()
1943 M68k::CondCode CCode = (M68k::CondCode)Op0.getConstantOperandVal(0); in LowerSETCC()
2052 unsigned CondCode = in LowerSELECT() local
2056 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2195 if ((CondCode == M68k::COND_CC || CondCode == M68k::COND_CS) && in LowerSELECT()
2392 M68k::CondCode CCode = in LowerBRCOND()
2410 M68k::CondCode CCode = in LowerBRCOND()
2423 M68k::CondCode CCode = in LowerBRCOND()
3004 M68k::CondCode CC = M68k::CondCode(MI.getOperand(3).getImm()); in EmitLoweredSelect()
3398 M68k::CondCode CC = M68k::CondCode(N->getConstantOperandVal(0)); in combineM68kSetCC()
[all …]
|
| /llvm-project-15.0.7/llvm/lib/Target/ARC/MCTargetDesc/ |
| H A D | ARCInstPrinter.cpp | 54 static const char *ARCCondCodeToString(ARCCC::CondCode CC) { in ARCCondCodeToString()
172 O << ARCCondCodeToString((ARCCC::CondCode)Op.getImm()); in printPredicateOperand()
184 O << ARCCondCodeToString((ARCCC::CondCode)MI->getOperand(OpNum).getImm()); in printCCOperand()
|
| H A D | ARCInfo.h | 24 enum CondCode { enum
|
| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | GlobalISelEmitter-setcc.td | 21 // Check there is an error if not a CondCode operand.
22 // ERR: [[FILE]]:[[@LINE+1]]:1: warning: Skipped pattern: Unable to handle CondCode
|
| /llvm-project-15.0.7/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiInstPrinter.cpp | 290 LPCC::CondCode CC = in printCCOperand()
291 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printCCOperand()
301 LPCC::CondCode CC = in printPredicateOperand()
302 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printPredicateOperand()
|
| /llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsInstPrinter.h | 32 enum CondCode { enum
72 const char *MipsFCCToString(Mips::CondCode CC);
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 254 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
281 inline static const char *getCondCodeName(CondCode Code) { in getCondCodeName()
303 inline static CondCode getInvertedCondCode(CondCode Code) { in getInvertedCondCode()
306 return static_cast<CondCode>(static_cast<unsigned>(Code) ^ 0x1); in getInvertedCondCode()
313 inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { in getNZCVToSatisfyCondCode()
|