Home
last modified time | relevance | path

Searched refs:CompleteModel (Results 1 – 25 of 69) sorted by relevance

123

/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCSchedule.h302 bool CompleteModel; member
330 bool isComplete() const { return CompleteModel; } in isComplete()
/llvm-project-15.0.7/llvm/test/TableGen/
H A DSchedModelError.td15 let CompleteModel = 1;
H A DInvalidMCSchedClassDesc.td13 let CompleteModel = 0 in {
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kSchedule.td20 let CompleteModel = 0;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonScheduleV69.td34 let CompleteModel = 0;
H A DHexagonScheduleV62.td31 let CompleteModel = 0;
H A DHexagonScheduleV55.td42 let CompleteModel = 0;
H A DHexagonScheduleV65.td34 let CompleteModel = 0;
H A DHexagonScheduleV66.td34 let CompleteModel = 0;
H A DHexagonScheduleV67.td34 let CompleteModel = 0;
H A DHexagonScheduleV5.td40 let CompleteModel = 0;
H A DHexagonScheduleV68.td33 let CompleteModel = 0;
H A DHexagonScheduleV67T.td56 let CompleteModel = 0;
H A DHexagonScheduleV60.td75 let CompleteModel = 0;
/llvm-project-15.0.7/llvm/lib/Target/Lanai/
H A DLanaiSchedule.td36 let CompleteModel = 0;
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCScheduleA2.td165 let CompleteModel = 0;
H A DPPCScheduleG5.td124 let CompleteModel = 0;
H A DPPCScheduleE500.td276 let CompleteModel = 0;
H A DPPCScheduleE500mc.td331 let CompleteModel = 0;
H A DPPCScheduleE5500.td375 let CompleteModel = 0;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64SchedFalkor.td24 let CompleteModel = 1;
H A DAArch64SchedKryo.td28 let CompleteModel = 1;
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleM4.td20 let CompleteModel = 0;
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVSchedSiFive7.td17 let CompleteModel = 0;
H A DRISCVSchedRocket.td19 let CompleteModel = false;

123