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Searched refs:Commutable (Results 1 – 18 of 18) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoF.td194 DAGOperand rty, bit Commutable>
197 let isCommutable = Commutable;
200 list<ExtInfo_r> Exts, bit Commutable = 0> {
209 bit Commutable>
213 let isCommutable = Commutable;
216 list<ExtInfo_r> Exts, bit Commutable = 0> {
280 DAGOperand rty, bit Commutable>
283 let isCommutable = Commutable;
286 list<ExtInfo_r> Exts, bit Commutable = 0> {
318 defm FADD_S : FPALU_rr_frm_m<0b0000000, "fadd.s", FINX, /*Commutable*/1>;
[all …]
H A DRISCVInstrInfoM.td28 def MUL : ALU_rr<0b0000001, 0b000, "mul", /*Commutable*/1>,
30 def MULH : ALU_rr<0b0000001, 0b001, "mulh", /*Commutable*/1>,
34 def MULHU : ALU_rr<0b0000001, 0b011, "mulhu", /*Commutable*/1>,
50 def MULW : ALUW_rr<0b0000001, 0b000, "mulw", /*Commutable*/1>,
H A DRISCVInstrInfoZfh.td112 defm FADD_H : FPALU_rr_frm_m<0b0000010, "fadd.h", HINX, /*Commutable*/1>;
116 defm FMUL_H : FPALU_rr_frm_m<0b0001010, "fmul.h", HINX, /*Commutable*/1>;
138 defm FMIN_H : FPALU_rr_m<0b0010110, 0b000, "fmin.h", HINX, /*Commutable*/1>;
139 defm FMAX_H : FPALU_rr_m<0b0010110, 0b001, "fmax.h", HINX, /*Commutable*/1>;
176 defm FEQ_H : FPCmp_rr_m<0b1010010, 0b010, "feq.h", HINX, /*Commutable*/1>;
H A DRISCVInstrInfoD.td117 defm FADD_D : FPALU_rr_frm_m<0b0000001, "fadd.d", DINX, /*Commutable*/1>;
121 defm FMUL_D : FPALU_rr_frm_m<0b0001001, "fmul.d", DINX, /*Commutable*/1>;
143 defm FMIN_D : FPALU_rr_m<0b0010101, 0b000, "fmin.d", DINX, /*Commutable*/1>;
144 defm FMAX_D : FPALU_rr_m<0b0010101, 0b001, "fmax.d", DINX, /*Commutable*/1>;
155 defm FEQ_D : FPCmp_rr_m<0b1010001, 0b010, "feq.d", DINX, /*Commutable*/1>;
H A DRISCVInstrInfo.td538 bit Commutable = 0>
541 let isCommutable = Commutable;
566 bit Commutable = 0>
569 let isCommutable = Commutable;
643 def ADD : ALU_rr<0b0000000, 0b000, "add", /*Commutable*/1>,
653 def XOR : ALU_rr<0b0000000, 0b100, "xor", /*Commutable*/1>,
659 def OR : ALU_rr<0b0000000, 0b110, "or", /*Commutable*/1>,
661 def AND : ALU_rr<0b0000000, 0b111, "and", /*Commutable*/1>,
737 def ADDW : ALUW_rr<0b0000000, 0b000, "addw", /*Commutable*/1>,
H A DRISCVInstrInfoZb.td533 def CLMULR : ALU_rr<0b0000101, 0b010, "clmulr", /*Commutable*/1>,
538 def CLMUL : ALU_rr<0b0000101, 0b001, "clmul", /*Commutable*/1>,
540 def CLMULH : ALU_rr<0b0000101, 0b011, "clmulh", /*Commutable*/1>,
545 def MIN : ALU_rr<0b0000101, 0b100, "min", /*Commutable*/1>,
547 def MINU : ALU_rr<0b0000101, 0b101, "minu", /*Commutable*/1>,
549 def MAX : ALU_rr<0b0000101, 0b110, "max", /*Commutable*/1>,
551 def MAXU : ALU_rr<0b0000101, 0b111, "maxu", /*Commutable*/1>,
H A DRISCVInstrInfoVPseudos.td2572 bit Commutable = 0> {
2574 let isCommutable = Commutable in
2584 Constraint, /*Commutable*/1>;
2596 Constraint, /*Commutable*/1>;
2604 /*Commutable*/1>;
/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h173 Commutable, enumerator
478 bool isCommutable() const { return Flags & (1ULL << MCID::Commutable); } in isCommutable()
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DPatternMatch.h915 (Commutable && L.match(I->getOperand(1)) && in match()
951 bool Commutable = false>
964 (Commutable && L.match(I->getOperand(1)) && in match()
970 (Commutable && L.match(CE->getOperand(1)) && in match()
1221 : public BinaryOp_match<LHS_t, RHS_t, 0, Commutable> {
1360 bool Commutable = false>
1376 } else if (Commutable && L.match(I->getOperand(1)) && in match()
1747 bool Commutable = false>
1766 (Commutable && L.match(RHS) && R.match(LHS)); in match()
1792 (Commutable && L.match(RHS) && R.match(LHS)); in match()
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/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86Instr3DNow.td29 X86FoldableSchedWrite sched, bit Commutable = 0,
31 let isCommutable = Commutable in
H A DX86InstrMMX.td35 X86FoldableSchedWrite sched, bit Commutable = 0,
42 let isCommutable = Commutable;
91 bit Commutable = 0> {
92 let isCommutable = Commutable in
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrNEON.td2628 let isCommutable = Commutable;
2641 let isCommutable = Commutable;
2679 let isCommutable = Commutable;
2690 let isCommutable = Commutable;
2730 let isCommutable = Commutable;
2740 let isCommutable = Commutable;
2786 let isCommutable = Commutable;
2796 let isCommutable = Commutable;
3050 let isCommutable = Commutable;
3061 let isCommutable = Commutable;
[all …]
H A DARMInstrThumb2.td729 SDPatternOperator opnode, bit Commutable = 0,
747 let isCommutable = Commutable;
798 SDPatternOperator opnode, bit Commutable = 0> :
799 T2I_bin_irs<opcod, opc, iii, iir, iis, opnode, Commutable, ".w"> {
872 bit Commutable = 0> {
886 let isCommutable = Commutable;
922 bit Commutable = 0> {
1000 let isCommutable = Commutable;
1027 bit Commutable = 0> {
1043 let isCommutable = Commutable;
H A DARMInstrInfo.td1525 SDPatternOperator opnode, bit Commutable = 0> {
1550 let isCommutable = Commutable;
1671 bit Commutable = 0> {
1681 let isCommutable = Commutable;
1731 SDPatternOperator opnode, bit Commutable = 0,
1753 let isCommutable = Commutable;
1862 bit Commutable = 0> {
1887 let isCommutable = Commutable;
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DMIPatternMatch.h362 bool Commutable = false>
375 (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
384 template <typename LHS_P, typename RHS_P, bool Commutable = false>
400 (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARCInstrInfo.td157 string opasm, bit Commutable> {
163 { let isCommutable = Commutable; }
255 multiclass ArcBinaryGEN4Inst<bits<6> mincode, string opasm, bit Commutable = 0> :
256 ArcBinaryInst<0b00100, mincode, opasm, Commutable>;
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td538 bit Commutable = 0> : R_YXZ<0x31, sop, pcode, (outs GPR:$rz),
540 let isCommutable = Commutable;
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstr.h1062 return hasProperty(MCID::Commutable, Type);