Searched refs:CmpLo (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCExpandAtomicPseudoInsts.cpp | 234 Register CmpLo = MI.getOperand(4).getReg(); in expandAtomicCmpSwap128() local
269 .addReg(CmpLo); in expandAtomicCmpSwap128()
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| H A D | PPCISelLowering.cpp | 18179 Value *CmpLo = Builder.CreateTrunc(CmpVal, Int64Ty, "cmp_lo"); in emitMaskedAtomicCmpXchgIntrinsic() local
18189 Builder.CreateCall(IntCmpXchg, {Addr, CmpLo, CmpHi, NewLo, NewHi}); in emitMaskedAtomicCmpXchgIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 3588 auto CmpLo = B.buildICmp(CmpInst::ICMP_UGE, S1, Sub1_Lo, DenomLo); in legalizeUnsignedDIV_REM64Impl() local
3589 auto C2 = B.buildSExt(S32, CmpLo); in legalizeUnsignedDIV_REM64Impl()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 6290 SDValue CmpLo = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftRightParts() local
6293 ARMcc, CCR, CmpLo); in LowerShiftRightParts()
6338 SDValue CmpLo = getARMCmp(ExtraShAmt, DAG.getConstant(0, dl, MVT::i32), in LowerShiftLeftParts() local
6342 DAG.getConstant(0, dl, VT), ARMcc, CCR, CmpLo); in LowerShiftLeftParts()
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