Searched refs:CarryOp (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3080 unsigned CarryOp, NoCarryOp; in ExpandIntRes_UADDSUBO() local
3084 CarryOp = ISD::ADDCARRY; in ExpandIntRes_UADDSUBO()
3089 CarryOp = ISD::SUBCARRY; in ExpandIntRes_UADDSUBO()
3098 CarryOp, TLI.getTypeToExpandTo(*DAG.getContext(), LHS.getValueType())); in ExpandIntRes_UADDSUBO()
3111 Hi = DAG.getNode(CarryOp, dl, VTList, HiOps); in ExpandIntRes_UADDSUBO()
3160 unsigned CarryOp = N->getOpcode() == ISD::SADDO_CARRY ? ISD::ADDCARRY in ExpandIntRes_SADDSUBO_CARRY() local
3162 Lo = DAG.getNode(CarryOp, dl, VTList, { LHSL, RHSL, N->getOperand(2) }); in ExpandIntRes_SADDSUBO_CARRY()
3987 unsigned CarryOp = IsAdd ? ISD::SADDO_CARRY : ISD::SSUBO_CARRY; in ExpandIntRes_SADDSUBO() local
3990 CarryOp, TLI.getTypeToExpandTo(*DAG.getContext(), LHS.getValueType())); in ExpandIntRes_SADDSUBO()
4000 Hi = DAG.getNode(CarryOp, dl, VTList, { LHSH, RHSH, Lo.getValue(1) }); in ExpandIntRes_SADDSUBO()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 213 unsigned CarryOp = in instCombineIntrinsic() local
215 assert(II.getArgOperand(CarryOp)->getType()->getScalarSizeInBits() == 32 && in instCombineIntrinsic()
219 if (IC.SimplifyDemandedBits(&II, CarryOp, APInt::getOneBitSet(32, 29), in instCombineIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 6254 MachineInstr *CarryOp = in moveToVALU() local
6261 CreatedBBTmp = legalizeOperands(*CarryOp); in moveToVALU()
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