| /llvm-project-15.0.7/llvm/unittests/Support/ |
| H A D | CRCTest.cpp | 22 TEST(CRCTest, CRC32) { in TEST() argument
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| /llvm-project-15.0.7/llvm/tools/llvm-dwarfutil/ |
| H A D | llvm-dwarfutil.cpp | 211 uint32_t getCRC32() { return CRC32; } in getCRC32()
215 uint32_t CRC32 = 0; member in llvm::dwarfutil::raw_crc_ostream
219 CRC32 = crc32( in write_impl()
220 CRC32, ArrayRef<uint8_t>(reinterpret_cast<const uint8_t *>(Ptr), Size)); in write_impl()
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| /llvm-project-15.0.7/llvm/lib/ObjCopy/COFF/ |
| H A D | COFFObjcopy.cpp | 49 uint32_t CRC32 = llvm::crc32(arrayRefFromStringRef(LinkTarget->getBuffer())); in createGnuDebugLinkSectionContents() local
55 support::endian::write32le(Data.data() + CRCPos, CRC32); in createGnuDebugLinkSectionContents()
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| /llvm-project-15.0.7/compiler-rt/lib/scudo/ |
| H A D | CMakeLists.txt | 97 # Enable the AArch64 CRC32 feature for scudo_crc32.cpp, if available.
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| /llvm-project-15.0.7/compiler-rt/lib/scudo/standalone/ |
| H A D | CMakeLists.txt | 109 # Enable the AArch64 CRC32 feature for crc32_hw.cpp, if available.
|
| /llvm-project-15.0.7/llvm/include/llvm/Support/ |
| H A D | X86TargetParser.def | 161 X86_FEATURE (CRC32, "crc32")
|
| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | BuiltinsAArch64.def | 47 // CRC32
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| H A D | BuiltinsARM.def | 159 // CRC32
|
| /llvm-project-15.0.7/llvm/docs/ |
| H A D | ScudoHardenedAllocator.rst | 93 The checksum is computed using a CRC32 (made faster with hardware support)
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| /llvm-project-15.0.7/llvm/lib/ObjCopy/ELF/ |
| H A D | ELFObject.h | 889 uint32_t CRC32; variable
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| H A D | ELFObject.cpp | 1115 : FileName(File), CRC32(PrecomputedCRC) { in GnuDebugLinkSection()
1125 *CRC = Sec.CRC32; in visit()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrFormats.td | 761 // CRC32I - SSE 4.2 CRC32 instructions.
762 // NOTE: 'HasCRC32' is used as CRC32 instructions are GPR only and not directly
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| H A D | X86Schedule.td | 464 // CRC32 instruction.
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| H A D | X86.td | 46 … "Enable SSE 4.2 CRC32 instruction (used when SSE4.2 is supported but function is GPR only)">;
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| H A D | X86ScheduleZnver3.td | 1217 // CRC32 instruction.
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedTSV110.td | 359 def : InstRW<[TSV110Wr_2cyc_1MDU, TSV110ReadCRC], (instregex "^CRC32.*$")>;
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| H A D | AArch64SchedExynosM3.td | 876 def : InstRW<[M3WriteC2], (instregex "^CRC32")>;
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| H A D | AArch64SchedA57.td | 179 def : InstRW<[A57Write_3cyc_1W], (instregex "^CRC32")>;
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| H A D | AArch64SchedFalkorDetails.td | 1206 def : InstRW<[FalkorWr_1X_2cyc], (instregex "^CRC32.*$")>;
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| H A D | AArch64SchedThunderX2T99.td | 577 // def : InstRW<[THX2T99Write_4Cyc_I1], (instregex "^CRC32", "^CRC32C")>;
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| H A D | AArch64SchedThunderX3T110.td | 836 // def : InstRW<[THX3T110Write_4Cyc_I1], (instregex "^CRC32", "^CRC32C")>;
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | IntrinsicsARM.td | 320 // CRC32
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| H A D | IntrinsicsAArch64.td | 830 // CRC32
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | AutoUpgrade.cpp | 2557 Function *CRC32 = Intrinsic::getDeclaration(F->getParent(), in UpgradeIntrinsicCall() local
2560 Rep = Builder.CreateCall(CRC32, {Trunc0, CI->getArgOperand(1)}); in UpgradeIntrinsicCall()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA57.td | 1481 def : InstRW<[A57Write_3cyc_1W], (instregex "^(t2)?CRC32")>;
|