Home
last modified time | relevance | path

Searched refs:COND2 (Results 1 – 25 of 55) sorted by relevance

123

/llvm-project-15.0.7/llvm/test/Transforms/Util/
H A Dlibcalls-shrinkwrap-double.ll13 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
23 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
33 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
43 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
72 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
82 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
92 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
102 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
128 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
204 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
[all …]
H A Dlibcalls-shrinkwrap-float.ll12 ; CHECK: [[COND2:%[0-9]+]] = fcmp ogt float %value, 8.900000e+01
13 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
22 ; CHECK: [[COND2:%[0-9]+]] = fcmp ogt float %value, 8.800000e+01
23 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
33 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
43 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
73 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
83 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
93 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
103 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
[all …]
H A Dlibcalls-shrinkwrap-long-double.ll12 ; CHECK: [[COND2:%[0-9]+]] = fcmp ogt x86_fp80 %value, 0xK400CB174000000000000
13 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
22 ; CHECK: [[COND2:%[0-9]+]] = fcmp ogt x86_fp80 %value, 0xK400CB170000000000000
23 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
33 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
43 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
73 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
83 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
93 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
103 ; CHECK: [[COND:%[0-9]+]] = or i1 [[COND2]], [[COND1]]
[all …]
/llvm-project-15.0.7/clang/test/CoverageMapping/
H A Dbranch-macros.cpp7 #define COND2 (a != b) macro
8 #define COND3 (COND1 && COND2)
9 #define COND4 (COND3 ? COND2 : COND1)
22 …bool c = COND1 && COND2; // CHECK: Branch,File 1, [[@LINE-16]]:15 -> [[@LINE-16]]:23 = #1, (#0 - #… in func()
/llvm-project-15.0.7/llvm/test/tools/llvm-cov/
H A Dbranch-macros.cpp6 #define COND2 (a != b) macro
7 #define COND3 (COND1 && COND2)
8 #define COND4 (COND3 ? COND2 : COND1)
17 bool c = COND1 && COND2; // CHECK: | | | Branch ([[@LINE-12]]:15): [True: 1, False: 2] in func()
/llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/
H A Dpr49495.ll9 ; CHECK-NEXT: [[COND2:%.*]] = icmp ugt ptr [[A2]], [[B]]
10 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[COND1]], i1 [[COND2]], i1 false
25 ; CHECK-NEXT: [[COND2:%.*]] = icmp ult i32 [[A2]], [[B]]
26 ; CHECK-NEXT: [[RES:%.*]] = select i1 [[COND1]], i1 [[COND2]], i1 false
/llvm-project-15.0.7/llvm/test/Transforms/JumpThreading/
H A Dpre-load.ll18 ; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[A_PR]], 0
19 ; CHECK-NEXT: br i1 [[COND2]], label [[YES]], label [[NO:%.*]]
55 ; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[A_PR]], 0
56 ; CHECK-NEXT: [[COND2_FR:%.*]] = freeze i1 [[COND2]]
H A Dthread-two-bbs-threshold.ll17 ; CHECK-NEXT: [[COND2_FR:%.*]] = freeze i32 [[COND2:%.*]]
22 ; CHECK-NEXT: [[COND2_FR2:%.*]] = freeze i32 [[COND2]]
H A Dthread-two-bbs.ll19 ; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[COND2:%.*]], 0
22 ; CHECK-NEXT: [[TOBOOL12:%.*]] = icmp eq i32 [[COND2]], 0
86 ; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i32 [[COND2:%.*]], 0
90 ; CHECK-NEXT: [[TOBOOL11:%.*]] = icmp eq i32 [[COND2]], 0
/llvm-project-15.0.7/llvm/test/Transforms/SimpleLoopUnswitch/
H A Dtrivial-unswitch-profmd.ll12 ; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[ENTRY_SPLIT:%.*]] [
19 ; CHECK-NEXT: switch i32 [[COND2]], label [[LOOP2:%.*]] [
81 ; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[LOOP_EXIT2:%.*]] [
90 ; CHECK-NEXT: switch i32 [[COND2]], label [[LOOP2:%.*]] [
153 ; CHECK-NEXT: switch i32 [[COND2:%.*]], label [[LOOP_EXIT2:%.*]] [
164 ; CHECK-NEXT: switch i32 [[COND2]], label [[LOOP2:%.*]] [
H A DLIV-loop-condtion.ll24 ; CHECK-NEXT: %[[COND2:.*]] = icmp eq i32 %[[VAR3]], 10
25 ; CHECK-NEXT: %[[COND_AND:.*]] = and i1 true, %[[COND2]]
H A Dtrivial-unswitch-logical-and-or.ll13 ; CHECK-NEXT: [[COND_AND1:%.*]] = and i1 [[COND2:%.*]], [[COND1:%.*]]
41 ; CHECK-NEXT: [[TMP0:%.*]] = and i1 [[COND2:%.*]], [[COND1:%.*]]
76 ; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[COND2:%.*]], [[COND1:%.*]]
114 ; CHECK-NEXT: [[COND_AND1:%.*]] = or i1 [[COND2:%.*]], [[COND1:%.*]]
144 ; CHECK-NEXT: [[COND2_FR:%.*]] = freeze i1 [[COND2:%.*]]
202 ; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[COND4:%.*]], [[COND2:%.*]]
H A Dtrivial-unswitch-freeze-individual-conditions.ll16 ; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND2:%.*]], [[COND3:%.*]]
54 ; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND2:%.*]], [[COND3:%.*]]
92 ; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND2:%.*]], [[COND3:%.*]]
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/X86/
H A Dfreeze-brcond.ll192 ; CHECK-NEXT: [[COND2:%.*]] = and i1 [[C:%.*]], [[COND]]
193 ; CHECK-NEXT: [[FR:%.*]] = freeze i1 [[COND2]]
217 ; CHECK-NEXT: [[COND2:%.*]] = and i1 [[C:%.*]], [[COND]]
218 ; CHECK-NEXT: [[COND3:%.*]] = and i1 [[D:%.*]], [[COND2]]
253 ; CHECK-NEXT: [[COND2:%.*]] = and i1 [[COND]], [[C3]]
254 ; CHECK-NEXT: [[FR:%.*]] = freeze i1 [[COND2]]
281 ; CHECK-NEXT: [[COND2:%.*]] = or i1 [[C:%.*]], [[COND]]
282 ; CHECK-NEXT: [[FR:%.*]] = freeze i1 [[COND2]]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dphi-equal-incoming-pointers.ll26 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
67 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
109 ; ALL-NEXT: br i1 [[COND2:%.*]], label [[BB3:%.*]], label [[BB4:%.*]]
174 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
214 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
255 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
350 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i8 [[RES_PHI]], i8 1
397 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
448 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
499 ; ALL-NEXT: [[RES:%.*]] = select i1 [[COND2:%.*]], i32 [[RES_PHI]], i32 1
[all …]
H A Dcall_nonnull_arg.ll13 ; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[B:%.*]], 0
14 ; CHECK-NEXT: br i1 [[COND2]], label [[DEAD]], label [[NOT_ZERO:%.*]]
H A Dusub-overflow-known-by-implied-cond.ll237 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND]], [[COND2:%.*]]
267 ; CHECK-NEXT: [[AND:%.*]] = select i1 [[COND]], i1 [[COND2:%.*]], i1 false
297 ; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND]], [[COND2:%.*]]
329 ; CHECK-NEXT: [[AND:%.*]] = select i1 [[COND]], i1 [[COND2:%.*]], i1 false
361 ; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND]], [[COND2:%.*]]
393 ; CHECK-NEXT: [[OR:%.*]] = select i1 [[COND]], i1 true, i1 [[COND2:%.*]]
425 ; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND]], [[COND2:%.*]]
457 ; CHECK-NEXT: [[OR:%.*]] = select i1 [[COND]], i1 true, i1 [[COND2:%.*]]
/llvm-project-15.0.7/llvm/test/Transforms/IndVarSimplify/
H A Drewrite-loop-exit-value.ll71 ; CHECK-NEXT: [[COND2:%.*]] = icmp eq i32 [[INDVAR]], 10
72 ; CHECK-NEXT: br i1 [[COND2]], label [[HEADER_BACKEDGE]], label [[BODY:%.*]]
106 ; CHECK-NEXT: br i1 [[COND2:%.*]], label [[HEADER]], label [[EXIT]]
135 ; CHECK-NEXT: br i1 [[COND2:%.*]], label [[LOOP]], label [[EXIT:%.*]]
/llvm-project-15.0.7/llvm/test/Transforms/LoopInterchange/
H A Dupdate-condbranch-duplicate-successors.ll38 ; CHECK-NEXT: [[COND2:%.*]] = icmp eq i64 [[OUTER_IV_NEXT]], 1000
39 ; CHECK-NEXT: br i1 [[COND2]], label [[INNER_HEADER_SPLIT]], label [[OUTER_HEADER]]
108 ; CHECK-NEXT: [[COND2:%.*]] = icmp eq i64 [[OUTER_IV_NEXT]], 1000
109 ; CHECK-NEXT: br i1 [[COND2]], label [[INNER_HEADER_SPLIT]], label [[OUTER_HEADER]]
/llvm-project-15.0.7/llvm/test/Transforms/IRCE/
H A Dstride_more_than_1.ll32 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp slt i32 %idx.next, %exit.mainloop.at
33 ; CHECK-NEXT: br i1 [[COND2]], label %loop, label %main.exit.selector
97 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp slt i32 %idx.next, %exit.mainloop.at
98 ; CHECK-NEXT: br i1 [[COND2]], label %loop, label %main.exit.selector
163 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp slt i32 %idx.next, %exit.mainloop.at
164 ; CHECK-NEXT: br i1 [[COND2]], label %loop, label %main.exit.selector
283 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp sgt i32 %idx.next.preloop, %exit.preloop.at
284 ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop, label %preloop.exit.selector
349 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 %idx.next.preloop, %exit.preloop.at
350 ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop, label %preloop.exit.selector
[all …]
H A Dempty_ranges.ll35 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ult i32 %idx.next.lcssa, 100
36 ; CHECK-NEXT: br i1 [[COND2]], label %main.pseudo.exit, label %exit
H A Dunsigned_comparisons_ugt.ll62 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at
63 ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
152 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at
153 ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Dunroll-loop-invalidation.ll60 ; CHECK: %[[COND2:.*]] = icmp eq i32 %{{.*}}, %inner1.count
61 ; CHECK: br i1 %[[COND2]],
H A D2011-08-08-PhiUpdate.ll18 ; CHECK-NEXT: [[COND2:%.*]] = call zeroext i1 @check()
19 ; CHECK-NEXT: br i1 [[COND2]], label [[IF_THEN_LOOPEXIT:%.*]], label [[IF_ELSE_1:%.*]]
155 ; CHECK-NEXT: [[COND2:%.*]] = call zeroext i1 @check()
156 ; CHECK-NEXT: br i1 [[COND2]], label [[EXIT:%.*]], label [[DO_COND:%.*]]
/llvm-project-15.0.7/mlir/test/Conversion/SPIRVToLLVM/
H A Dcontrol-flow-ops-to-llvm.mlir51 // CHECK: %[[COND2:.*]] = llvm.mlir.constant(false) : i1
53 // CHECK: llvm.cond_br %[[COND1]], ^bb1(%{{.*}}, %[[COND2]] : i32, i1), ^bb2

123