Searched refs:CMN (Results 1 – 21 of 21) sorted by relevance
| /llvm-project-15.0.7/clang/test/Modules/ |
| H A D | codegen-opt.test | 8 …vm -o - %t/bar.pcm -fmodule-file=%t/foo.pcm | FileCheck --check-prefix=BAR-CMN --check-prefix=BAR … 42 BAR-CMN-NOT: comdat 43 BAR-CMN: $_Z3barv = comdat any 45 BAR-CMN-NOT: {{comdat|define|declare}} 46 BAR-CMN: define weak_odr void @_Z3barv() #{{[0-9]+}} comdat 47 BAR-CMN-NOT: {{define|declare}} 51 BAR-CMN-NOT: {{define|declare}} 59 USE-CMN-NOT: {{comdat|define|declare}} 60 USE-CMN: define{{.*}} i32 @main() 61 USE-CMN-NOT: {{define|declare}} [all …]
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| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | negative-immediates.s | 30 CMN r0, #0xFFFFFF01 33 # CHECK-DISABLED: CMN 153 CMN r0, #0xFFFFFF01 156 # CHECK-DISABLED: CMN
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| H A D | basic-thumb-instructions.s | 210 @ CMN
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| H A D | thumb2-narrow-dp.ll | 726 // CMN - only two register version available 898 // CMN - only two register version available
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| H A D | basic-arm-instructions.s | 688 @ CMN
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| H A D | basic-thumb2-instructions.s | 576 @ CMN
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| /llvm-project-15.0.7/llvm/test/MC/AArch64/ |
| H A D | arm64-aliases.s | 58 ; ADDS to WZR/XZR is a CMN
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/ |
| H A D | thumb1.txt | 122 # CMN
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| H A D | basic-arm-instructions.txt | 420 # CMN
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| H A D | thumb2.txt | 301 # CMN
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | cond-br-tuning.ll | 7 ; CMN is an alias of ADDS.
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | README.txt | 582 The CMN instruction sets the flags like an ADD instruction, while CMP sets 583 them like a subtract. Therefore to be able to use CMN for comparisons other
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| H A D | ARMISelLowering.h | 87 CMN, // ARM CMN instructions. enumerator
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| H A D | ARMInstrThumb.td | 1102 // CMN register 1104 //FIXME: Disable CMN, as CCodes are backwards from compare expectations
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| H A D | ARMScheduleA57.td | 171 // ADD{S}, ADC{S}, ADR, AND{S}, BIC{S}, CMN, CMP, EOR{S}, ORN{S}, ORR{S},
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| H A D | ARMInstrInfo.td | 183 def ARMcmn : SDNode<"ARMISD::CMN", SDT_ARMCmp, 4895 // CMN register-integer 4912 // CMN register-register/shift 6344 // Same for CMP <--> CMN via mod_imm_neg
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| H A D | ARMInstrThumb2.td | 5279 // Same for CMP <--> CMN via t2_so_imm_neg
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| H A D | ARMISelLowering.cpp | 1687 MAKE_CASE(ARMISD::CMN) in getTargetNodeName()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedCyclone.td | 145 // Aliases: CMN, CMP, TST
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/GlobalISel/ |
| H A D | postlegalizer-lowering-swap-compare-operands.mir | 507 ; No reason to swap a CMN on the LHS when it won't introduce a constant
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/ |
| H A D | basic-a64-instructions.txt | 63 # These should really be CMN
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