Searched refs:CLO (Results 1 – 9 of 9) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 248 unsigned CLO = countLeadingOnes(Imm); in processLogicalImmediate() local 249 I = 64 - CLO; in processLogicalImmediate() 250 CTO = CLO + countTrailingOnes(Imm) - (64 - Size); in processLogicalImmediate()
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| /llvm-project-15.0.7/llvm/test/Transforms/InstSimplify/ |
| H A D | icmp-constant.ll | 215 ; 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2] 234 ; 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2] 272 ; 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2]
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| /llvm-project-15.0.7/llvm/test/MC/Mips/mips32/ |
| H A D | valid.s | 85 # CHECK-NEXT: # <MCInst #{{.*}} CLO
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| /llvm-project-15.0.7/llvm/test/MC/Mips/mips32r5/ |
| H A D | valid.s | 85 # CHECK-NEXT: # <MCInst #{{.*}} CLO
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| /llvm-project-15.0.7/llvm/test/MC/Mips/mips32r2/ |
| H A D | valid.s | 85 # CHECK-NEXT: # <MCInst #{{.*}} CLO
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| /llvm-project-15.0.7/llvm/test/MC/Mips/mips32r3/ |
| H A D | valid.s | 85 # CHECK-NEXT: # <MCInst #{{.*}} CLO
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsScheduleP5600.td | 182 def : InstRW<[P5600WriteAL2], (instrs CLO, CLZ, DI, EI, MFHI, MFLO,
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| H A D | MipsScheduleGeneric.td | 48 CLO, CLZ, EXT, INS, LEA_ADDiu, LUi, NOP,
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| H A D | MipsInstrInfo.td | 2365 def CLO : MMRel, CountLeading1<"clo", GPR32Opnd, II_CLO>, CLO_FM<0x21>,
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