Searched refs:BoolRC (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerControlFlow.cpp | 83 const TargetRegisterClass *BoolRC = nullptr; member in __anonfaa441410111::SILowerControlFlow
234 : MRI->createVirtualRegister(BoolRC); in emitIf()
241 Register Tmp = MRI->createVirtualRegister(BoolRC); in emitIf()
317 Register SaveReg = MRI->createVirtualRegister(BoolRC); in emitElse()
392 Register AndReg = MRI->createVirtualRegister(BoolRC); in emitIfBreak()
850 BoolRC = TRI->getBoolRC(); in runOnMachineFunction()
|
| H A D | SIWholeQuadMode.cpp | 1264 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in processBlock() local
1383 SavedNonStrictReg = MRI->createVirtualRegister(BoolRC); in processBlock()
1392 SavedWQMReg = MRI->createVirtualRegister(BoolRC); in processBlock()
|
| H A D | SIInstrInfo.td | 1086 class BoolRC : RegisterOperand<SReg_1> {
1096 def VOPDstS64orS32 : BoolRC {
1147 def SDWAVopcDst : BoolRC {
|
| H A D | SIISelLowering.cpp | 3597 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in emitLoadM0FromVGPRLoop() local
3598 Register PhiExec = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
3599 Register NewExec = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
3601 Register CondReg = MRI.createVirtualRegister(BoolRC); in emitLoadM0FromVGPRLoop()
4002 const TargetRegisterClass *BoolRC = TRI->getBoolRC(); in EmitInstrWithCustomInserter() local
4013 MI, MRI, Src0, BoolRC, AMDGPU::sub0, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
4015 MI, MRI, Src0, BoolRC, AMDGPU::sub1, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
4018 MI, MRI, Src1, BoolRC, AMDGPU::sub0, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
4020 MI, MRI, Src1, BoolRC, AMDGPU::sub1, &AMDGPU::SReg_32RegClass); in EmitInstrWithCustomInserter()
|