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Searched refs:BitCount (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/mlir/test/Target/SPIRV/
H A Dbit-ops.mlir5 // CHECK: spv.BitCount {{%.*}} : i32
6 %0 = spv.BitCount %arg : i32
/llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/
H A Dbit-ops.mlir4 // spv.BitCount
8 // CHECK: spv.BitCount {{%.*}} : i32
9 %0 = spv.BitCount %arg : i32
/llvm-project-15.0.7/lldb/source/Plugins/Process/Utility/
H A DInstructionUtils.h80 static inline uint32_t BitCount(uint64_t x) { in BitCount() function
/llvm-project-15.0.7/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp897 address = SP - 4*BitCount(registers); in EmulatePUSH()
914 SP = SP - 4*BitCount(registers); in EmulatePUSH()
933 if (BitCount(registers) < 1) in EmulatePUSH()
940 if (BitCount(registers) < 2) in EmulatePUSH()
1048 if (BitCount(registers) < 1) in EmulatePOP()
3940 if (BitCount(registers) < 1) in EmulateLDM()
4172 address = R[n] - 4*BitCount(registers); in EmulateLDMDB()
4618 if (BitCount(registers) < 1) in EmulateSTM()
4859 address = R[n] - 4*BitCount(registers); in EmulateSTMDB()
4896 if ((n == 15) || BitCount(registers) < 2) in EmulateSTMDB()
[all …]
/llvm-project-15.0.7/llvm/tools/llvm-rc/
H A DResourceFileWriter.cpp754 ulittle16_t BitCount; // HotspotY (.cur files but not CURSOR resource). member
769 ulittle16_t BitCount; member
844 writeObject(Res->Header.BitCount); in writeSingleIconOrCursorBody()
959 NewHeader.BitCount = BMPHeader->BitCount; in visitIconOrCursorResource()
965 NewHeader.BitCount = 32; in visitIconOrCursorResource()
/llvm-project-15.0.7/llvm/include/llvm/ADT/
H A DSparseBitVector.h801 unsigned BitCount = 0; in count() local
805 BitCount += Iter->count(); in count()
807 return BitCount; in count()
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SPIRV/IR/
H A DSPIRVBitOps.td66 def SPV_BitCountOp : SPV_BitUnaryOp<"BitCount", []> {
88 bitcount-op ::= ssa-id `=` `spv.BitCount` ssa-use
95 %2 = spv.BitCount %0: i32
96 %3 = spv.BitCount %1: vector<4xi32>
/llvm-project-15.0.7/mlir/test/Conversion/SPIRVToLLVM/
H A Dbitwise-ops-to-llvm.mlir4 // spv.BitCount
10 %0 = spv.BitCount %arg0: i16
17 %0 = spv.BitCount %arg0: vector<3xi32>
/llvm-project-15.0.7/llvm/unittests/ADT/
H A DBitVectorTest.cpp1146 int BitCount = 0; in TYPED_TEST() local
1149 BitCount++; in TYPED_TEST()
1151 ASSERT_EQ(BitCount, 0); in TYPED_TEST()
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dinvalid-thumbv7.txt150 # if BitCount(registers) < 1 then UNPREDICTABLE
/llvm-project-15.0.7/mlir/docs/
H A DSPIRVToLLVMDialectConversion.md151 `spv.BitCount` | `llvm.intr.ctpop`