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Searched refs:BIAS (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/compiler-rt/lib/builtins/hexagon/
H A Ddfmul.S46 #define BIAS 1024 macro
75 TMP = #-BIAS
93 BTMP = combine(##BIAS+BIAS-4,#0)
130 EXP0 = add(EXP0,#-BIAS-58)
174 EXP1 = add(EXP0,#-BIAS-58)
182 EXP1 += add(EXP0,##-BIAS-58)
187 p0 = cmp.gt(EXP1,##BIAS+BIAS-2) // overflow
H A Ddffma.S66 #define BIAS 1023 macro
187 EXPA = add(EXPA,#-BIAS+(ADJUST))
300 TMP = #BIAS+BIAS-2
313 EXPA = add(EXPA,#-BIAS-60)
352 EXPA = add(EXPA,#-BIAS-60)
385 p0 = cmp.gt(EXPA,##BIAS+BIAS)
432 TMP = #-BIAS-(MANTBITS+FUDGE2)
H A Ddfaddsub.S47 #define BIAS 1024 macro
127 EXPB = add(EXPA,#-BIAS-60)
207 p0 = cmp.gt(EXPB,##BIAS+BIAS-2)
/llvm-project-15.0.7/compiler-rt/lib/builtins/ppc/
H A Dfixunstfti.c15 #define BIAS 1023 macro
46 hiExponent = ((ldUnion.ull[0] & 0x7FFFFFFFFFFFFFFFll) >> 52) - BIAS; in __fixunstfti()
47 loExponent = ((ldUnion.ull[1] & 0x7FFFFFFFFFFFFFFFll) >> 52) - BIAS; in __fixunstfti()
/llvm-project-15.0.7/llvm/test/Transforms/PGOProfile/
H A Dcounter_promo_with_bias.ll9 ; CHECK: %[[BIAS:[0-9]+]] = load i64, ptr @__llvm_profile_counter_bias
17 ; CHECK: %[[COUNTER_PTR:[0-9]+]] = add i64 ptrtoint (ptr @__profc_foo to i64), %[[BIAS]]
/llvm-project-15.0.7/mlir/test/Dialect/Tosa/
H A Dtosa-decompose-transpose-conv.mlir55 // CHECK-DAG: %[[BIAS:.+]] = "tosa.const"() {value = dense<0.000000e+00> : tensor<30xf32>}
56 …// CHECK-DAG: %[[CONV:.+]] = "tosa.conv2d"(%[[NEWINPUT]], %[[NEWWEIGHT]], %[[BIAS]]) {dilation = […
87 // CHECK-DAG: %[[BIAS:.+]] = "tosa.const"() {value = dense<0> : tensor<30xi32>}
88 …// CHECK-DAG: %[[CONV:.+]] = "tosa.conv2d"(%[[NEWINPUT]], %[[NEWWEIGHT]], %[[BIAS]]) {dilation = […
/llvm-project-15.0.7/llvm/test/CodeGen/SPARC/
H A D64abi.ll25 i32 signext %a6, ; [%fp+BIAS+176]
26 i8* %a7) { ; [%fp+BIAS+184]
90 float %a16, ; [%fp+BIAS+256] (using 8 bytes)
91 double %a17) { ; [%fp+BIAS+264] (using 8 bytes)
163 i64 %a6, ; [%fp+BIAS+176]
164 double *%a7, ; [%fp+BIAS+184]
166 i16* %a9) { ; [%fp+BIAS+200]
H A Dvarargs.ll14 ; Store the address of the ... args to %ap at %fp+BIAS+128-8
/llvm-project-15.0.7/mlir/test/Conversion/TosaToLinalg/
H A Dtosa-to-linalg-named.mlir481 …// CHECK: [[BIAS:%.+]] = linalg.generic {indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP1]]], ite…
505 …// CHECK: %[[BIAS:.+]] = linalg.generic {indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP1]]], ite…
527 …// CHECK: [[BIAS:%.+]] = linalg.generic {indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP1]]], ite…
555 …// CHECK: [[BIAS:%.+]] = linalg.generic {indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP1]]], ite…
579 …// CHECK: [[BIAS:%.+]] = linalg.generic {indexing_maps = [#[[$MAP0]], #[[$MAP1]], #[[$MAP1]]], ite…
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcCallingConv.td46 // array starting at [%fp+BIAS+128] in the callee's stack frame. All arguments
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/AMDGPU/
H A Damdgcn-intrinsics.ll3024 …l <4 x float> @llvm.amdgcn.image.sample.b.1d.v4f32.f16.f16(i32 15, half [[BIAS:%.*]], half [[S:%.*…
3038 … <4 x float> @llvm.amdgcn.image.sample.b.1d.v4f32.f32.f32(i32 15, float [[BIAS:%.*]], float [[S32]…
3050 …l <4 x float> @llvm.amdgcn.image.sample.b.2d.v4f32.f16.f16(i32 15, half [[BIAS:%.*]], half [[S:%.*…
3066 … <4 x float> @llvm.amdgcn.image.sample.b.2d.v4f32.f32.f32(i32 15, float [[BIAS:%.*]], float [[S32]…
3079 …<4 x float> @llvm.amdgcn.image.sample.c.b.1d.v4f32.f16.f16(i32 15, half [[BIAS:%.*]], float [[ZCOM…
3093 …4 x float> @llvm.amdgcn.image.sample.c.b.1d.v4f32.f32.f32(i32 15, float [[BIAS:%.*]], float [[ZCOM…
3134 …4 x float> @llvm.amdgcn.image.sample.b.cl.1d.v4f32.f16.f16(i32 15, half [[BIAS:%.*]], half [[S:%.*…
3150 … x float> @llvm.amdgcn.image.sample.b.cl.1d.v4f32.f32.f32(i32 15, float [[BIAS:%.*]], float [[S32]…
4843 … <4 x float> @llvm.amdgcn.image.sample.b.1d.v4f32.f32.f32(i32 15, float [[BIAS:%.*]], float [[S:%.…
4856 … <4 x float> @llvm.amdgcn.image.sample.b.2d.v4f32.f32.f32(i32 15, float [[BIAS:%.*]], float [[S:%.…
[all …]
H A Damdgcn-demanded-vector-elts-inseltpoison.ll3199 …]] = call float @llvm.amdgcn.image.sample.b.1d.f32.f32.f32(i32 8, float [[BIAS:%.*]], float [[S:%.…
3215 … x float> @llvm.amdgcn.image.sample.b.cl.1d.v2f32.f32.f32(i32 12, float [[BIAS:%.*]], float [[S:%.…
3422 … = call float @llvm.amdgcn.image.sample.c.b.1d.f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[ZCOM…
3438 …call float @llvm.amdgcn.image.sample.c.b.cl.1d.f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[ZCOM…
3582 …amdgcn.image.sample.b.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.…
3598 …gcn.image.sample.b.cl.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.…
3742 …dgcn.image.sample.c.b.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOM…
3758 …n.image.sample.c.b.cl.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOM…
3875 … float> @llvm.amdgcn.image.gather4.b.2darray.v4f32.f32.f32(i32 8, float [[BIAS:%.*]], float [[S:%.…
3892 … float> @llvm.amdgcn.image.gather4.b.cl.cube.v4f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[S:%.…
[all …]
H A Damdgcn-demanded-vector-elts.ll3199 …]] = call float @llvm.amdgcn.image.sample.b.1d.f32.f32.f32(i32 8, float [[BIAS:%.*]], float [[S:%.…
3215 … x float> @llvm.amdgcn.image.sample.b.cl.1d.v2f32.f32.f32(i32 12, float [[BIAS:%.*]], float [[S:%.…
3422 … = call float @llvm.amdgcn.image.sample.c.b.1d.f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[ZCOM…
3438 …call float @llvm.amdgcn.image.sample.c.b.cl.1d.f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[ZCOM…
3582 …amdgcn.image.sample.b.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.…
3598 …gcn.image.sample.b.cl.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[S:%.…
3742 …dgcn.image.sample.c.b.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOM…
3758 …n.image.sample.c.b.cl.o.1d.f32.f32.f32(i32 1, i32 [[OFFSET:%.*]], float [[BIAS:%.*]], float [[ZCOM…
3875 … float> @llvm.amdgcn.image.gather4.b.2darray.v4f32.f32.f32(i32 8, float [[BIAS:%.*]], float [[S:%.…
3892 … float> @llvm.amdgcn.image.gather4.b.cl.cube.v4f32.f32.f32(i32 1, float [[BIAS:%.*]], float [[S:%.…
[all …]