| /llvm-project-15.0.7/llvm/lib/Object/ |
| H A D | IRSymtab.cpp | 405 if (BFC.Mods.empty()) in readBitcode()
410 if (BFC.StrtabForSymtab.empty() || in readBitcode()
411 BFC.Symtab.size() < sizeof(storage::Header)) in readBitcode()
412 return upgrade(BFC.Mods); in readBitcode()
418 auto *Hdr = reinterpret_cast<const storage::Header *>(BFC.Symtab.data()); in readBitcode()
420 StringRef Producer = Hdr->Producer.get(BFC.StrtabForSymtab); in readBitcode()
423 return upgrade(BFC.Mods); in readBitcode()
427 FC.TheReader = {{BFC.Symtab.data(), BFC.Symtab.size()}, in readBitcode()
428 {BFC.StrtabForSymtab.data(), BFC.StrtabForSymtab.size()}}; in readBitcode()
434 if (FC.TheReader.getNumModules() != BFC.Mods.size()) in readBitcode()
[all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | fabs-to-bfc.ll | 2 …N: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+vfp3 | FileCheck %s -check-prefix=CHECK-BFC
10 ;CHECK-BFC: bfc
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| /llvm-project-15.0.7/llvm/tools/llvm-lto2/ |
| H A D | llvm-lto2.cpp | 440 BitcodeFileContents BFC = in dumpSymtab() local
443 if (BFC.Symtab.size() >= sizeof(irsymtab::storage::Header)) { in dumpSymtab()
445 BFC.Symtab.data()); in dumpSymtab()
448 outs() << "producer: " << Hdr->Producer.get(BFC.StrtabForSymtab) in dumpSymtab()
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| /llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/ |
| H A D | thumb2-bfc.ll | 27 ; 2147483646 = 0x7ffffffe not implementable w/ BFC
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/GlobalISel/ |
| H A D | arm-instruction-select-combos.mir | 705 ; CHECK: [[BFC:%[0-9]+]]:gpr = BFC [[COPY]], -65529, 14 /* CC::al */, $noreg
706 ; CHECK: $r0 = COPY [[BFC]]
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| /llvm-project-15.0.7/llvm/include/llvm/Object/ |
| H A D | IRSymtab.h | 375 Expected<FileContents> readBitcode(const BitcodeFileContents &BFC);
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleSwift.td | 185 // BFI,BFC, SBFX,UBFX
187 (instregex "BFC", "BFI", "UBFX", "SBFX", "(t|t2)BFC", "(t|t2)BFI",
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| H A D | ARMScheduleR52.td | 228 (instregex "BFC", "BFI", "UBFX", "SBFX", "(t|t2)BFC", "(t|t2)BFI",
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| H A D | ARMScheduleM7.td | 342 def : InstRW<[WriteALUsi,M7Slot0Only], (instregex "t2(BFC|BFI)$")>;
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| H A D | ARMScheduleA57.td | 351 // Bit field insert/clear: BFI, BFC
352 def : InstRW<[A57Write_2cyc_1M], (instregex "(t2)?BFI", "(t2)?BFC")>;
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| H A D | ARMScheduleA9.td | 119 // BFC, BFI, UBFX, SBFX
2545 def : InstRW< [WriteALUsi], (instregex "BFC", "BFI", "UBFX", "SBFX")>;
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| H A D | ARMFrameLowering.cpp | 643 BuildMI(MBB, MBBI, DL, TII.get(ARM::BFC), Reg) in emitAligningInstructions()
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| H A D | ARMInstrVFP.td | 1293 (VMOVDRR GPR:$Rl, (BFC GPR:$Rh, (i32 0x7FFFFFFF)))>,
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| H A D | ARMInstrInfo.td | 4166 def BFC : I<(outs GPR:$Rd), (ins GPR:$src, bf_inv_mask_imm:$imm),
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/ |
| H A D | basic-arm-instructions.txt | 265 # BFC
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| H A D | thumb2.txt | 179 # BFC
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| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 465 @ BFC
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| H A D | basic-thumb2-instructions.s | 437 @ BFC
|