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Searched refs:BEXTR (Results 1 – 23 of 23) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dbmi-x86_64.ll19 ; BEXTR-SLOW-LABEL: bextr64b:
20 ; BEXTR-SLOW: # %bb.0:
24 ; BEXTR-SLOW-NEXT: retq
26 ; BEXTR-FAST-LABEL: bextr64b:
27 ; BEXTR-FAST: # %bb.0:
30 ; BEXTR-FAST-NEXT: retq
50 ; BEXTR-SLOW: # %bb.0:
54 ; BEXTR-SLOW-NEXT: retq
60 ; BEXTR-FAST-NEXT: retq
98 ; BEXTR-FAST-NEXT: retq
[all …]
H A Dbmi.ll368 ; X86-SLOW-BEXTR: # %bb.0:
372 ; X86-SLOW-BEXTR-NEXT: retl
375 ; X64-SLOW-BEXTR: # %bb.0:
379 ; X64-SLOW-BEXTR-NEXT: retq
382 ; X86-FAST-BEXTR: # %bb.0:
385 ; X86-FAST-BEXTR-NEXT: retl
391 ; X64-FAST-BEXTR-NEXT: retq
421 ; X86-SLOW-BEXTR-NEXT: retl
428 ; X64-SLOW-BEXTR-NEXT: retq
435 ; X86-FAST-BEXTR-NEXT: retl
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/X86/
H A Dsafe-low-bit-extract.ll4 ; This is the naive implementation of x86 BZHI/BEXTR instruction:
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ScheduleSLM.td165 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86ISelLowering.h406 BEXTR, enumerator
H A DX86IntrinsicsInfo.h1222 X86_INTRINSIC_DATA(bmi_bextr_32, INTR_TYPE_2OP, X86ISD::BEXTR, 0),
1223 X86_INTRINSIC_DATA(bmi_bextr_64, INTR_TYPE_2OP, X86ISD::BEXTR, 0),
H A DX86ScheduleAtom.td148 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86ISelDAGToDAG.cpp3768 SDValue Extract = CurDAG->getNode(X86ISD::BEXTR, DL, XVT, X, Control); in matchBitExtract()
5590 SDValue BEXTR = SDValue(NewNode, 0); in Select() local
5591 NewNode = CurDAG->getMachineNode(TestOpc, dl, MVT::i32, BEXTR, BEXTR); in Select()
H A DX86Schedule.td205 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86ScheduleBtVer2.td251 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86ScheduleBdVer2.td596 // BMI1 BEXTR, BMI2 BZHI
H A DX86SchedSandyBridge.td205 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86ScheduleZnver1.td232 // BMI1 BEXTR, BMI2 BZHI
H A DX86ScheduleZnver2.td231 // BMI1 BEXTR, BMI2 BZHI
H A DX86.td602 "Indicates that the BEXTR instruction is implemented as a single uop "
H A DX86SchedSkylakeClient.td200 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86SchedBroadwell.td210 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86ScheduleZnver3.td827 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86SchedHaswell.td212 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86SchedSkylakeServer.td200 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86SchedIceLake.td208 // BMI1 BEXTR/BLS, BMI2 BZHI
H A DX86InstrInfo.td286 def X86bextr : SDNode<"X86ISD::BEXTR", SDTIntBinOp>;
2637 // Use BEXTR for 64-bit 'and' with large immediate 'mask'.
H A DX86ISelLowering.cpp33590 NODE_NAME_CASE(BEXTR) in getTargetNodeName()
36910 case X86ISD::BEXTR: in computeKnownBitsForTargetNode()
41987 case X86ISD::BEXTR: in SimplifyDemandedBitsForTargetNode()
41997 if (Opc == X86ISD::BEXTR && MaskedVal1 != Val1) { in SimplifyDemandedBitsForTargetNode()
42000 Op, TLO.DAG.getNode(X86ISD::BEXTR, DL, VT, Op0, in SimplifyDemandedBitsForTargetNode()
42023 assert(Opc == X86ISD::BEXTR && "Unexpected opcode!"); in SimplifyDemandedBitsForTargetNode()
55060 case X86ISD::BEXTR: in PerformDAGCombine()