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/llvm-project-15.0.7/llvm/test/Transforms/OpenMP/
H A Dattributor_recursion_crash.ll15 ; CHECK-NEXT: br i1 false, label [[BB4:%.*]], label [[BB3:%.*]]
17 ; CHECK-NEXT: br label [[BB4]]
18 ; CHECK: BB4:
26 ; CHECK-NEXT: [[PRE2]] = phi %struct.TS* [ null, [[BB4]] ], [ [[Q3]], [[BB5]] ]
34 br i1 false, label %BB4, label %BB3
37 br label %BB4
39 BB4:
49 %pre2 = phi %"struct.TS"* [ null, %BB4 ], [ %q3, %BB5 ]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/
H A Dslp-max-phi-size.ll87 ; MAX32-NEXT: i32 2, label [[BB4:%.*]]
96 ; MAX32-NEXT: [[PHI1:%.*]] = phi float [ [[I19]], [[BB3]] ], [ [[I19]], [[BB4]] ], [ [[FVAL]], […
97 ; MAX32-NEXT: [[PHI2:%.*]] = phi float [ [[I17]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I17]], […
99 ; MAX32-NEXT: [[PHI4:%.*]] = phi float [ [[I13]], [[BB3]] ], [ [[I13]], [[BB4]] ], [ [[I13]], [[…
100 ; MAX32-NEXT: [[PHI5:%.*]] = phi float [ [[I11]], [[BB3]] ], [ [[I11]], [[BB4]] ], [ [[FVAL]], […
101 ; MAX32-NEXT: [[PHI6:%.*]] = phi float [ [[I8]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[I8]], [[B…
102 ; MAX32-NEXT: [[PHI7:%.*]] = phi float [ [[I5]], [[BB3]] ], [ [[FVAL]], [[BB4]] ], [ [[FVAL]], […
103 ; MAX32-NEXT: [[PHI8:%.*]] = phi float [ [[I2]], [[BB3]] ], [ [[I2]], [[BB4]] ], [ [[I2]], [[BB5…
104 ; MAX32-NEXT: [[PHI9:%.*]] = phi float [ [[I21]], [[BB3]] ], [ [[I21]], [[BB4]] ], [ [[I21]], [[…
160 ; MAX256-NEXT: i32 2, label [[BB4:%.*]]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/ADCE/
H A Dbasictest.ll6 br label %BB4
11 BB3: ; preds = %BB4, %BB2
12 %ret = phi i32 [ %X, %BB4 ], [ %B, %BB2 ] ; <i32> [#uses=1]
15 BB4: ; preds = %BB1
H A Dunreachable.ll6 br label %BB4
11 BB3: ; preds = %BB4, %BB2
12 %ret = phi i32 [ %X, %BB4 ], [ %B, %BB2 ] ; <i32> [#uses=1]
15 BB4: ; preds = %BB1
/llvm-project-15.0.7/llvm/test/Transforms/SCCP/
H A D2002-05-20-MissedIncomingValue.ll9 BB2: ; preds = %BB4, %bb1
10 %V = phi i32 [ 0, %bb1 ], [ %A, %BB4 ] ; <i32> [#uses=1]
13 br i1 %c, label %BB4, label %BB5
14 BB4: ; preds = %BB3
H A Dapint-phi.ll7 %V = phi i999 [2, %bb1], [%A, %BB4]
13 br i1 %F, label %BB4, label %BB5
14 BB4:
H A Drange-and.ll179 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
284 ; CHECK-NEXT: br label [[BB4:%.*]]
286 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]]
288 ; CHECK-NEXT: br label [[BB4]]
320 ; CHECK-NEXT: br label [[BB4:%.*]]
322 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]]
325 ; CHECK-NEXT: br label [[BB4]]
358 ; CHECK-NEXT: br label [[BB4:%.*]]
360 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]]
362 ; CHECK-NEXT: br label [[BB4]]
[all …]
H A Dsccptest.ll40 ; CHECK-NEXT: br i1 [[KCOND]], label [[BB3:%.*]], label [[BB4:%.*]]
43 ; CHECK: BB4:
57 br i1 %kcond, label %BB3, label %BB4
61 BB4:
/llvm-project-15.0.7/llvm/test/Transforms/TypePromotion/AArch64/
H A Dloops.ll118 ; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB16:%.*]]
131 ; CHECK-NEXT: br i1 [[I15]], label [[BB4]], label [[BB16]]
133 ; CHECK-NEXT: [[I17:%.*]] = phi i16 [ [[I1]], [[BB]] ], [ [[I12]], [[BB4]] ]
170 ; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB16:%.*]]
183 ; CHECK-NEXT: br i1 [[I15]], label [[BB4]], label [[BB16]]
221 ; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB15:%.*]]
233 ; CHECK-NEXT: br i1 [[I14]], label [[BB4]], label [[BB15]]
272 ; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB15:%.*]]
284 ; CHECK-NEXT: br i1 [[I14]], label [[BB4]], label [[BB15]]
324 ; CHECK-NEXT: br i1 [[I3]], label [[BB4:%.*]], label [[BB16:%.*]]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/CorrelatedValuePropagation/
H A Dmerge-range-and-undef.ll99 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB4:%.*]], label [[BB5:%.*]]
199 ; CHECK-NEXT: br label [[BB4:%.*]]
201 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]]
203 ; CHECK-NEXT: br label [[BB4]]
246 ; CHECK-NEXT: br label [[BB4:%.*]]
248 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]]
251 ; CHECK-NEXT: br label [[BB4]]
295 ; CHECK-NEXT: br label [[BB4:%.*]]
297 ; CHECK-NEXT: br i1 [[C2:%.*]], label [[BB3:%.*]], label [[BB4]]
299 ; CHECK-NEXT: br label [[BB4]]
[all …]
H A Dpr35807.ll8 ; CHECK-NEXT: br i1 undef, label [[BB3:%.*]], label [[BB4:%.*]]
28 ; CHECK-NEXT: [[TMP41:%.*]] = phi i64 [ 4, [[BB4]] ], [ [[TMP20]], [[BB14]] ], [ undef, [[BB32]]…
/llvm-project-15.0.7/bolt/test/X86/
H A Dtail-duplication-cache.s15 # FDATA: 1 main #.BB0_br# 1 main #.BB4# 0 100
24 # FDATA2: 1 main #.BB0_br# 1 main #.BB4# 0 100
41 je .BB4
56 .BB4: label
/llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/
H A Dbranch-fold-dbg.ll22 ; CHECK-NEXT: br i1 [[OR_COND2]], label [[COMMON_RET]], label [[BB4:%.*]]
25 ; CHECK: BB4:
48 br i1 %7, label %BB5, label %BB4, !dbg !13
50 BB4: ; preds = %BB3
H A DSimplifyTerminatorOnSelect-domtree-preservation-edgecase.ll14 ; CHECK-NEXT: br i1 [[COND]], label [[BB4:%.*]], label [[BB2:%.*]]
17 ; CHECK-NEXT: br label [[BB4]]
/llvm-project-15.0.7/llvm/test/Transforms/LoopRotate/
H A Dpreserve-scev.ll12 br label %BB4
14 BB2: ; preds = %BB4
20 br label %BB4
22 BB4: ; preds = %BB2, %BB1
/llvm-project-15.0.7/llvm/unittests/IR/
H A DDominatorTreeTest.cpp129 BasicBlock *BB4 = &*FI++; in TEST() local
130 BBI = BB4->begin(); in TEST()
139 EXPECT_TRUE(DT->isReachableFromEntry(BB4)); in TEST()
146 EXPECT_TRUE(DT->dominates(BB0, BB4)); in TEST()
152 EXPECT_FALSE(DT->dominates(BB1, BB4)); in TEST()
158 EXPECT_FALSE(DT->dominates(BB2, BB4)); in TEST()
164 EXPECT_FALSE(DT->dominates(BB3, BB4)); in TEST()
220 EXPECT_TRUE(DT->dominates(Y1, BB4)); in TEST()
226 EXPECT_FALSE(DT->dominates(Y3, BB4)); in TEST()
235 EXPECT_TRUE(PDT->dominates(BB4, BB1)); in TEST()
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopUnroll/
H A Dunroll-after-peel.ll11 ; CHECK-NEXT: br i1 [[C:%.*]], label [[BB2_PEEL:%.*]], label [[BB4:%.*]]
14 ; CHECK-NEXT: br i1 [[TMP3_PEEL]], label [[BB1_PEEL_NEXT:%.*]], label [[BB4]]
25 ; CHECK-NEXT: br label [[BB4]]
/llvm-project-15.0.7/llvm/test/Transforms/LoopDeletion/
H A Dirreducible-cfg.ll20 ; CHECK-NEXT: br i1 [[CMP]], label [[BB12]], label [[BB4:%.*]]
28 ; CHECK-NEXT: [[K_ADDR_2]] = phi i16 [ [[K_ADDR_0]], [[BB2]] ], [ 0, [[BB4]] ]
29 ; CHECK-NEXT: [[X_2:%.*]] = phi i16 [ 1, [[BB2]] ], [ [[X_1]], [[BB4]] ]
31 ; CHECK-NEXT: br i1 [[CMP5]], label [[BB2]], label [[BB4]]
33 ; CHECK-NEXT: [[RESULT_1_LCSSA:%.*]] = phi i16 [ [[RESULT_1]], [[BB4]] ]
146 ; CHECK-NEXT: i8 73, label [[BB4:%.*]]
H A Ddcetest.ll14 br i1 %kcond, label %BB3, label %BB4
20 BB4: ; preds = %BB2
/llvm-project-15.0.7/llvm/test/Transforms/NewGVN/
H A Dsq-ctxi.ll11 ; CHECK-NEXT: br i1 [[TOBOOL3_NOT_I]], label [[BB4:%.*]], label [[BB3:%.*]]
19 ; CHECK-NEXT: br label [[BB4]]
H A Dpr34430.ll16 ; CHECK-NEXT: br label [[BB4:%.*]]
20 ; CHECK-NEXT: br label [[BB4]]
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dloop_break.ll17 ; OPT-NEXT: br i1 [[CMP0]], label [[BB4:%.*]], label [[FLOW]]
23 ; OPT-NEXT: [[TMP1:%.*]] = phi i1 [ [[CMP1]], [[BB4]] ], [ true, [[BB1]] ]
94 ; OPT-NEXT: br i1 [[CMP0]], label [[BB4:%.*]], label [[FLOW]]
100 ; OPT-NEXT: [[MY_TMP3:%.*]] = phi i1 [ [[CMP1]], [[BB4]] ], [ undef, [[BB1]] ]
185 ; OPT-NEXT: br i1 [[CMP0]], label [[BB4:%.*]], label [[FLOW]]
273 ; OPT-NEXT: br i1 [[CMP0]], label [[BB4:%.*]], label [[FLOW]]
279 ; OPT-NEXT: [[MY_TMP3:%.*]] = phi i1 [ [[CMP1]], [[BB4]] ], [ true, [[BB1]] ]
361 ; OPT-NEXT: br i1 [[CMP0]], label [[BB4:%.*]], label [[FLOW]]
367 ; OPT-NEXT: [[MY_TMP3:%.*]] = phi i1 [ [[CMP1]], [[BB4]] ], [ false, [[BB1]] ]
452 ; OPT-NEXT: br i1 [[CMP0]], label [[BB4:%.*]], label [[FLOW]]
[all …]
H A Dindirect-addressing-si-noopt.ll29 ; CHECK: s_cbranch_scc1 [[BB4:.LBB[0-9]+_[0-9]+]]
35 ; CHECK: [[BB4]]:
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/
H A Dscaling-factor-incompat-type.ll13 ; CHECK-NEXT: br label [[BB4:%.*]]
28 ; CHECK-NEXT: br i1 true, label [[BB1:%.*]], label [[BB4]]
/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dlooptest.ll33 ; CHECK-NEXT: br i1 [[COND221]], label [[BB5]], label [[BB4:%.*]]
35 ; CHECK-NEXT: [[REG117:%.*]] = phi i32 [ [[REG118:%.*]], [[BB4]] ], [ 0, [[BB3]] ]
42 ; CHECK-NEXT: br i1 [[COND224]], label [[BB4]], label [[BB5]]

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