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/llvm-project-15.0.7/clang/test/Layout/
H A Dms-x86-lazy-empty-nonvirtual-base.cpp16 struct B8 { char c[5]; B8() { printf("B8 = %p\n", this); } }; in B8() argument
29 struct AA : B8, B1, virtual B0 {
53 struct AB : B8, B1, virtual B0 {
77 struct AC : B8, B1, virtual B0 {
101 struct AD : B8, B1, virtual B0 {
500 struct F : B1, B6, B4, B8, B5, virtual B0 {
530 struct G : B8, B1, virtual B0 {
/llvm-project-15.0.7/llvm/test/Transforms/SCCP/
H A Dlatticeval-invalidate.ll13 %B8 = shl i64 %B, 9223372036854775807
15 %B10 = urem i64 %B, %B8
17 %BB = and i64 %B, %B8
19 %B23 = lshr i64 %B8, undef
28 %B15 = sub i64 %B8, %B23
39 %C14 = icmp slt i64 %B8, 0
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/X86/
H A Dbin_power.ll53 ; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
54 ; CHECK-NEXT: [[R1:[^ ]+]] = add i32 [[B8]], -1
90 ; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
91 ; CHECK-NEXT: [[B11:[^ ]+]] = mul i32 [[B3]], [[B8]]
92 ; CHECK-NEXT: [[B16:[^ ]+]] = mul i32 [[B8]], [[B8]]
134 ; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
135 ; CHECK-NEXT: [[B16:[^ ]+]] = mul i32 [[B8]], [[B8]]
231 ; CHECK-NEXT: [[B8:[^ ]+]] = mul i32 [[B4]], [[B4]]
232 ; CHECK-NEXT: [[B16:[^ ]+]] = mul i32 [[B8]], [[B8]]
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dattr-mode-enums.c34 enum __attribute__((mode(QI))) { A8, B8 } x8 = B8; in main() enumerator
H A Ddebug-info-enum.cpp95 enum E8 { A8 = -128, B8 = 127 } x8; enumerator
/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dpr38539.ll45 %B8 = srem i66 0, %B20
46 %C2 = icmp ule i66 %B8, %B20
100 %B8 = srem i34 0, %B20
101 %C2 = icmp ule i34 %B8, %B20
H A Ddllexport-x86_64.ll126 @blob = global [6 x i8] c"\B8*\00\00\00\C3", section ".text", align 16
H A Dfmaddsub-combine.ll367 %B8 = extractelement <16 x float> %B, i32 8
368 %sub8 = fsub float %A8, %B8
782 %B8 = extractelement <16 x float> %B, i32 8
783 %sub8 = fadd float %A8, %B8
/llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/
H A Dpr32372.ll15 %B8 = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 %L5, i8 %L)
16 %B9 = extractvalue {i8, i1} %B8, 0
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULibFunc.h254 B8 = 1, enumerator
263 U8 = UINT | B8,
267 I8 = INT | B8,
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dcomplex-successor-structure-3.ll127 ; B8:
338 br i1 %cmp132, label %B8, label %C8
340 B8: ; preds = %A8
356 FINAL: ; preds = %C8, %B8
357 %V.4 = phi i64 [ 1041, %B8 ], [ %phitmp2, %C8 ]
H A Dcomplex-successor-structure-2.ll73 ; B8<--+
487 br i1 %cmp77.8, label %A8, label %B8
491 br label %B8
493 B8: ; preds = %A8, %B7
499 A9: ; preds = %B8
504 B9: ; preds = %A9, %B8
505 %55 = phi i16 [ %add84.8, %A9 ], [ %.reload, %B8 ]
H A Dcomplex-successor-structure.ll72 ; B8<--+
486 br i1 %cmp77.8, label %A8, label %B8
490 br label %B8
492 B8: ; preds = %A8, %B7
498 A9: ; preds = %B8
503 B9: ; preds = %A9, %B8
504 %55 = phi i16 [ %add84.8, %A9 ], [ %.reload, %B8 ]
/llvm-project-15.0.7/lld/test/COFF/
H A Dcommon-alignment.test6 # Operands of B8 (MOV EAX) are common symbols
H A Dcommon.test6 # Operands of B8 (MOV EAX) are common symbols
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dsdiv-canonicalize.ll92 %B8 = sub nsw i64 0, %v1
93 %B4 = sdiv i64 %L1, %B8
H A Dnot-add.ll189 %B8 = shl i32 %B20, %B14
190 %B2 = xor i32 %B12, %B8
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Daix-bytestring.ll4 …9F\A0\A1\A2\A3\A4\A5\A6\A7\A8\A9\AA\AB\AC\AD\AE\AF\B0\B1\B2\B3\B4\B5\B6\B7\B8\B9\BA\BB\BC\BD\BE\BF…
H A Dpr33547.ll6 …0\00\05\00\00\00\04\00\00\00\0A\00\00\00\0A\00\00\00\0B\00\00\00\0A\08\AF/\B8\B6\87\04 \A1\07\00\0…
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Ddecompose-ops.mlir62 // CHECK-SAME: %[[B8:[a-zA-Z0-9]+]]: f32
66 // CHECK-NEXT: %[[S1:.+]] = arith.mulf %[[B9]], %[[B8]]
171 // CHECK-SAME: %[[B8:[a-zA-Z0-9]+]]: f32
269 // CHECK-SAME: %[[B8:.+]]: f64
/llvm-project-15.0.7/clang/test/CXX/expr/expr.prim/expr.prim.id/
H A Dp3.cpp184 constexpr bool B8 = C8<T...>; variable
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dpal-userdata-regs.ll16 …A1\91\00\CD\A1\B1\00\CD\A1\B3\00\CD\A1\B4\00\CD\A1\B5\00\CD\A1\B6\00\CD\A1\B8\CE\01\00\00\00\CD\A1…
/llvm-project-15.0.7/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.h138 case AArch64::D8: return AArch64::B8; in getBRegFromDReg()
178 case AArch64::B8: return AArch64::D8; in getDRegFromBReg()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td268 def B8 : AArch64Reg<8, "b8">, DwarfRegNum<[72]>;
302 def H8 : AArch64Reg<8, "h8", [B8]>, DwarfRegAlias<B8>;
337 def S8 : AArch64Reg<8, "s8", [H8]>, DwarfRegAlias<B8>;
372 def D8 : AArch64Reg<8, "d8", [S8], ["v8", ""]>, DwarfRegAlias<B8>;
407 def Q8 : AArch64Reg<8, "q8", [D8], ["v8", ""]>, DwarfRegAlias<B8>;
/llvm-project-15.0.7/llvm/test/DebugInfo/Generic/
H A Ddebug-info-enum.ll164 !44 = !DIEnumerator(name: "B8", value: 127)

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