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Searched refs:ArgRegPair (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h434 struct ArgRegPair {
438 bool operator==(const ArgRegPair &Other) const {
454 std::vector<ArgRegPair> ArgForwardingRegs;
462 template <> struct MappingTraits<CallSiteInfo::ArgRegPair> {
463 static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) {
473 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::CallSiteInfo::ArgRegPair)
483 std::vector<CallSiteInfo::ArgRegPair>());
H A DMachineFunction.h431 struct ArgRegPair {
434 ArgRegPair(Register R, unsigned Arg) : Reg(R), ArgNo(Arg) {
439 using CallSiteInfo = SmallVector<ArgRegPair, 1>;
440 using CallSiteInfoImpl = SmallVectorImpl<ArgRegPair>;
/llvm-project-15.0.7/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp413 for (auto ArgRegPair : YamlCSInfo.ArgForwardingRegs) { in initializeCallSiteInfo() local
415 if (parseNamedRegisterReference(PFS, Reg, ArgRegPair.Reg.Value, Error)) in initializeCallSiteInfo()
416 return error(Error, ArgRegPair.Reg.SourceRange); in initializeCallSiteInfo()
417 CSInfo.emplace_back(Reg, ArgRegPair.ArgNo); in initializeCallSiteInfo()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMIRPrinter.cpp525 yaml::CallSiteInfo::ArgRegPair YmlArgReg; in convertCallSiteObjects()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp6749 llvm::erase_if(CSInfo, [&VA](MachineFunction::ArgRegPair ArgReg) { in LowerCall()