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/llvm-project-15.0.7/llvm/lib/TextAPI/
H A DTextStub.cpp210 std::vector<Architecture> Architectures; member
222 std::vector<Architecture> Architectures; member
472 ArchSet.insert(Architectures); in NormalizedTBD()
475 for (auto Architectures : ArchSet) { in NormalizedTBD() local
477 Section.Architectures = Architectures; in NormalizedTBD()
488 if (SymArch.second != Architectures) in NormalizedTBD()
539 ArchSet.insert(Architectures); in NormalizedTBD()
542 for (auto Architectures : ArchSet) { in NormalizedTBD() local
544 Section.Architectures = Architectures; in NormalizedTBD()
547 if (SymArch.second != Architectures) in NormalizedTBD()
[all …]
H A DSymbol.cpp49 Symbol::targets(ArchitectureSet Architectures) const { in targets()
51 [Architectures](const Target &Target) { in targets()
52 return Architectures.has(Target.Arch); in targets()
/llvm-project-15.0.7/llvm/test/tools/llvm-lipo/
H A Dinfo.test6 # CHECK: Architectures in the fat file:
8 # CHECK-NEXT: Architectures in the fat file:
H A Dinfo-universal-binary-ir.test8 # CHECK: Architectures in the fat file: {{.*}} are: x86_64 arm64
/llvm-project-15.0.7/openmp/runtime/
H A DREADME.txt46 Architectures Supported
61 Supported Architectures: IA-32 architecture, Intel(R) 64, and
90 Supported Architectures: IBM(R) Power 7 and Power 8
/llvm-project-15.0.7/llvm/test/tools/llvm-libtool-darwin/
H A Duniversal-bitcode-output.test14 # ARCHS: Architectures in the fat file: [[FILE]] are: armv7 arm64
52 # ARCHS-X86: Architectures in the fat file: [[FILE]] are: x86_64 x86_64h
74 # ARCHS-CPU: Architectures in the fat file: [[FILE]] are: armv7 x86_64
H A Duniversal-object-output.test14 # ARCHS: Architectures in the fat file: [[FILE]] are: armv6 armv7
52 # ARCHS-X86: Architectures in the fat file: [[FILE]] are: x86_64 x86_64h
76 # ARCHS-CPU: Architectures in the fat file: [[FILE]] are: ppc armv6
/llvm-project-15.0.7/openmp/libomptarget/
H A DREADME.txt27 Architectures Supported
45 Supported Architectures: Intel(R) 64, IBM(R) Power 7 and Power 8
/llvm-project-15.0.7/llvm/lib/ExecutionEngine/JITLink/
H A DCMakeLists.txt29 # Architectures:
/llvm-project-15.0.7/llvm/include/llvm/Config/
H A DTargets.def.in1 /*===- llvm/Config/Targets.def - LLVM Target Architectures ------*- C++ -*-===*\
/llvm-project-15.0.7/compiler-rt/cmake/
H A Dcrt-config-ix.cmake41 # Architectures supported by compiler-rt crt library.
H A Dbuiltin-config-ix.cmake227 # Architectures supported by compiler-rt libraries.
H A Dconfig-ix.cmake202 # Architectures.
627 # Architectures supported by compiler-rt libraries.
/llvm-project-15.0.7/llvm/docs/
H A DSPIRVUsage.rst28 .. table:: SPIR-V Architectures
H A DStackMaps.rst511 Supported Architectures
H A DAtomics.rst270 Architectures with weak memory ordering (essentially everything relevant today
H A DStatepoints.rst738 Supported Architectures
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssembly.td75 // Architectures.
/llvm-project-15.0.7/llvm/docs/CommandGuide/
H A Dllvm-lipo.rst43 Architectures in the fat file: <filename> are: <architectures>
H A Ddsymutil.rst29 Architectures may be specified by name. When using this option, an error will
H A Dllvm-dwarfdump.rst33 Architectures may be specified by name or by number. This
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagon.td23 // Hexagon Architectures
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ScheduleAtom.td15 // Scheduling information derived from the "Intel 64 and IA32 Architectures
/llvm-project-15.0.7/mlir/docs/Dialects/Linalg/
H A D_index.md251 [Optimizing Compilers for Modern Architectures](https://www.elsevier.com/books/optimizing-compilers…
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64.td484 // Architectures.

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