| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIOptimizeExecMaskingPreRA.cpp | 35 unsigned AndOpc; member in __anon6b0c42990111::SIOptimizeExecMaskingPreRA
133 if (!And || And->getOpcode() != AndOpc || in optimizeVcndVcmpPair()
338 if (I->getOpcode() == AndOpc && I->getOperand(0).getReg() == DstReg && in optimizeElseBranch()
383 AndOpc = Wave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64; in runOnMachineFunction()
|
| H A D | SILowerControlFlow.cpp | 84 unsigned AndOpc; member in __anonfaa441410111::SILowerControlFlow
244 BuildMI(MBB, I, DL, TII->get(AndOpc), Tmp) in emitIf()
330 MachineInstr *And = BuildMI(MBB, ElsePt, DL, TII->get(AndOpc), DstReg) in emitElse()
393 And = BuildMI(MBB, &MI, DL, TII->get(AndOpc), AndReg) in emitIfBreak()
853 AndOpc = AMDGPU::S_AND_B32; in runOnMachineFunction()
863 AndOpc = AMDGPU::S_AND_B64; in runOnMachineFunction()
|
| H A D | SIWholeQuadMode.cpp | 162 unsigned AndOpc; member in __anon487d63ae0111::SIWholeQuadMode
998 NewTerm = BuildMI(MBB, MI, DL, TII->get(AndOpc), Exec) in lowerKillI1()
1007 NewTerm = BuildMI(MBB, &MI, DL, TII->get(AndOpc), Exec) in lowerKillI1()
1011 unsigned Opcode = KillVal ? AndN2Opc : AndOpc; in lowerKillI1()
1173 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AndOpc), Exec) in toExact()
1546 AndOpc = AMDGPU::S_AND_B32; in runOnMachineFunction()
1554 AndOpc = AMDGPU::S_AND_B64; in runOnMachineFunction()
|
| H A D | AMDGPUInstructionSelector.cpp | 160 unsigned AndOpc = in selectCOPY() local
162 BuildMI(*BB, &I, DL, TII.get(AndOpc), MaskedReg) in selectCOPY()
1996 unsigned AndOpc = IsVALU ? AMDGPU::V_AND_B32_e64 : AMDGPU::S_AND_B32; in selectG_TRUNC() local
2001 BuildMI(*MBB, I, DL, TII.get(AndOpc), TmpReg1) in selectG_TRUNC()
|
| H A D | SIInstrInfo.cpp | 5486 unsigned AndOpc = in emitLoadSRsrcFromVGPRLoop() local
5540 BuildMI(LoopBB, I, DL, TII.get(AndOpc), AndReg) in emitLoadSRsrcFromVGPRLoop()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 801 unsigned AndOpc; in selectZext() local
803 AndOpc = X86::AND8ri; in selectZext()
805 AndOpc = X86::AND16ri8; in selectZext()
807 AndOpc = X86::AND32ri8; in selectZext()
809 AndOpc = X86::AND64ri8; in selectZext()
829 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AndOpc), DstReg) in selectZext()
|