Home
last modified time | relevance | path

Searched refs:AddSibling (Results 1 – 1 of 1) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp14687 SDValue Sub, Add, SubSibling, AddSibling; in tryCombineToBSL() local
14694 AddSibling = N1->getOperand(1 - j); in tryCombineToBSL()
14698 AddSibling = N0->getOperand(1 - i); in tryCombineToBSL()
14713 return DAG.getNode(AArch64ISD::BSP, DL, VT, Sub, SubSibling, AddSibling); in tryCombineToBSL()