| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 64 AddPromotedToType(ISD::LOAD, MVT::f32, MVT::i32); in AMDGPUTargetLowering()
67 AddPromotedToType(ISD::LOAD, MVT::v2f32, MVT::v2i32); in AMDGPUTargetLowering()
70 AddPromotedToType(ISD::LOAD, MVT::v3f32, MVT::v3i32); in AMDGPUTargetLowering()
73 AddPromotedToType(ISD::LOAD, MVT::v4f32, MVT::v4i32); in AMDGPUTargetLowering()
76 AddPromotedToType(ISD::LOAD, MVT::v5f32, MVT::v5i32); in AMDGPUTargetLowering()
79 AddPromotedToType(ISD::LOAD, MVT::v6f32, MVT::v6i32); in AMDGPUTargetLowering()
82 AddPromotedToType(ISD::LOAD, MVT::v7f32, MVT::v7i32); in AMDGPUTargetLowering()
85 AddPromotedToType(ISD::LOAD, MVT::v8f32, MVT::v8i32); in AMDGPUTargetLowering()
94 AddPromotedToType(ISD::LOAD, MVT::i64, MVT::v2i32); in AMDGPUTargetLowering()
100 AddPromotedToType(ISD::LOAD, MVT::f64, MVT::v2i32); in AMDGPUTargetLowering()
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| H A D | SIISelLowering.cpp | 200 AddPromotedToType(ISD::SELECT, MVT::f64, MVT::i64); in SITargetLowering()
207 AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); in SITargetLowering()
487 AddPromotedToType(ISD::LOAD, MVT::f16, MVT::i16); in SITargetLowering()
489 AddPromotedToType(ISD::STORE, MVT::f16, MVT::i16); in SITargetLowering()
547 AddPromotedToType(ISD::STORE, MVT::v2i16, MVT::i32); in SITargetLowering()
549 AddPromotedToType(ISD::STORE, MVT::v2f16, MVT::i32); in SITargetLowering()
552 AddPromotedToType(ISD::LOAD, MVT::v2i16, MVT::i32); in SITargetLowering()
554 AddPromotedToType(ISD::LOAD, MVT::v2f16, MVT::i32); in SITargetLowering()
557 AddPromotedToType(ISD::AND, MVT::v2i16, MVT::i32); in SITargetLowering()
559 AddPromotedToType(ISD::OR, MVT::v2i16, MVT::i32); in SITargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 247 AddPromotedToType(ISD::STRICT_SINT_TO_FP, MVT::i1, in PPCTargetLowering()
250 AddPromotedToType(ISD::STRICT_UINT_TO_FP, MVT::i1, in PPCTargetLowering()
254 AddPromotedToType (ISD::SINT_TO_FP, MVT::i1, in PPCTargetLowering()
257 AddPromotedToType(ISD::UINT_TO_FP, MVT::i1, in PPCTargetLowering()
268 AddPromotedToType(ISD::FP_TO_SINT, MVT::i1, in PPCTargetLowering()
271 AddPromotedToType(ISD::FP_TO_UINT, MVT::i1, in PPCTargetLowering()
598 AddPromotedToType(ISD::VAARG, MVT::i1, MVT::i64); in PPCTargetLowering()
600 AddPromotedToType(ISD::VAARG, MVT::i8, MVT::i64); in PPCTargetLowering()
602 AddPromotedToType(ISD::VAARG, MVT::i16, MVT::i64); in PPCTargetLowering()
604 AddPromotedToType(ISD::VAARG, MVT::i32, MVT::i64); in PPCTargetLowering()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetLowering.h | 2428 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { in AddPromotedToType() function
2436 AddPromotedToType(Opc, OrigVT, DestVT); in setOperationPromotedToType()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 775 AddPromotedToType(ISD::ATOMIC_SWAP, VT, IntVT); in initActions()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 75 AddPromotedToType(Opc, FromTy, ToTy); in initializeHVXLowering()
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| H A D | HexagonISelLowering.cpp | 1668 AddPromotedToType(ISD::SELECT, VT, VT32); in HexagonTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 330 AddPromotedToType(ISD::SETCC, MVT::i1, MVT::i32); in MipsTargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 631 AddPromotedToType(ISD::FADD, MVT::v4f16, MVT::v4f32); in AArch64TargetLowering()
632 AddPromotedToType(ISD::FSUB, MVT::v4f16, MVT::v4f32); in AArch64TargetLowering()
633 AddPromotedToType(ISD::FMUL, MVT::v4f16, MVT::v4f32); in AArch64TargetLowering()
634 AddPromotedToType(ISD::FDIV, MVT::v4f16, MVT::v4f32); in AArch64TargetLowering()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 161 AddPromotedToType (ISD::LOAD, VT, PromotedLdStVT); in addTypeForNEON()
164 AddPromotedToType (ISD::STORE, VT, PromotedLdStVT); in addTypeForNEON()
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