Searched refs:Add0 (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/ |
| H A D | broadcast.ll | 37 %Add0 = add i64 %v1, %v2
47 store i64 %Add0, i64 *%idxS0, align 8
97 %Add0 = add i32 %v1, %v2
107 store i32 %Add0, i32 *%idxS0, align 8
|
| /llvm-project-15.0.7/llvm/unittests/IR/ |
| H A D | PatternMatch.cpp | 1302 Value *Add0 = IRB.CreateExtractValue(Add, 0); in TEST_F() local
1305 EXPECT_TRUE(match(Add0, m_ExtractValue<0>(m_Value()))); in TEST_F()
1306 EXPECT_FALSE(match(Add0, m_ExtractValue<1>(m_Value()))); in TEST_F()
1313 EXPECT_FALSE(match(Add0, m_WithOverflowInst(WOI))); in TEST_F()
1317 EXPECT_TRUE(match(Add0, m_ExtractValue<0>(m_WithOverflowInst(WOI)))); in TEST_F()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 3990 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
3992 auto *Add0C = dyn_cast<ConstantSDNode>(Add0); in tryShiftAmountMod()
3997 NewShiftAmt = Add0; in tryShiftAmountMod()
4014 if (Add0.getValueType() != SubVT) { in tryShiftAmountMod()
4015 Add0 = CurDAG->getZExtOrTrunc(Add0, DL, SubVT); in tryShiftAmountMod()
4016 insertDAGNode(*CurDAG, OrigShiftAmt, Add0); in tryShiftAmountMod()
4019 X = CurDAG->getNode(ISD::ADD, DL, SubVT, Add1, Add0); in tryShiftAmountMod()
|
| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2913 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
2920 NewShiftAmt = Add0; in tryShiftAmountMod()
2922 isIntImmediate(Add0, Add0Imm) && Add0Imm != 0 && in tryShiftAmountMod()
2943 isIntImmediate(Add0, Add0Imm) && (Add0Imm % Size == Size - 1)) { in tryShiftAmountMod()
|
| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 13363 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0, N1.getOperand(0)); in TryDistrubutionADDVecReduce() local
13364 return DAG.getNode(ISD::ADD, dl, VT, Add0, N1.getOperand(1)); in TryDistrubutionADDVecReduce()
13383 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, N0.getOperand(1 - N0RedOp), in TryDistrubutionADDVecReduce() local
13386 DAG.getNode(ISD::ADD, dl, VT, Add0, N0.getOperand(N0RedOp)); in TryDistrubutionADDVecReduce()
13473 SDValue Add0 = DAG.getNode(ISD::ADD, dl, VT, X, N1); in TryDistrubutionADDVecReduce() local
13474 return DAG.getNode(ISD::ADD, dl, VT, Add0, N0); in TryDistrubutionADDVecReduce()
|