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Searched refs:AcquireRelease (Results 1 – 25 of 50) sorted by relevance

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/llvm-project-15.0.7/mlir/test/Target/SPIRV/
H A Dbarrier-ops.mlir10 // CHECK: spv.MemoryBarrier Subgroup, "AcquireRelease|SubgroupMemory"
11 spv.MemoryBarrier Subgroup, "AcquireRelease|SubgroupMemory"
20 // CHECK: spv.ControlBarrier Workgroup, Invocation, "AcquireRelease|UniformMemory"
21 spv.ControlBarrier Workgroup, Invocation, "AcquireRelease|UniformMemory"
H A Datomic-ops.mlir18 // CHECK: spv.AtomicOr "Workgroup" "AcquireRelease" %{{.*}}, %{{.*}} : !spv.ptr<i32, Workgroup>
19 %6 = spv.AtomicOr "Workgroup" "AcquireRelease" %ptr, %value : !spv.ptr<i32, Workgroup>
28 // CHECK: spv.AtomicXor "Workgroup" "AcquireRelease" %{{.*}}, %{{.*}} : !spv.ptr<i32, Workgroup>
29 %11 = spv.AtomicXor "Workgroup" "AcquireRelease" %ptr, %value : !spv.ptr<i32, Workgroup>
/llvm-project-15.0.7/llvm/include/llvm/Support/
H A DAtomicOrdering.h63 AcquireRelease = 6, enumerator
142 return AtomicOrdering::AcquireRelease; in getMergedAtomicOrdering()
/llvm-project-15.0.7/mlir/test/Conversion/MemRefToSPIRV/
H A Dmemref-to-spirv.mlir231 // CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
232 // CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
255 // CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
256 // CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
284 // CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
285 // CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
368 // CHECK: spv.AtomicAnd "Device" "AcquireRelease" %[[PTR]], %[[MASK]]
369 // CHECK: spv.AtomicOr "Device" "AcquireRelease" %[[PTR]], %[[STORE_VAL]]
H A Dalloc.mlir51 // CHECK: %{{.+}} = spv.AtomicAnd "Workgroup" "AcquireRelease" %[[PTR]], %{{.+}} : !spv.ptr…
52 // CHECK: %{{.+}} = spv.AtomicOr "Workgroup" "AcquireRelease" %[[PTR]], %{{.+}} : !spv.ptr<…
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRVUtils.cpp199 case AtomicOrdering::AcquireRelease: in getMemSemantics()
200 return SPIRV::MemorySemantics::AcquireRelease; in getMemSemantics()
/llvm-project-15.0.7/mlir/test/Dialect/SPIRV/IR/
H A Dbarrier-ops.mlir45 …ne of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `Sequentia…
H A Datomic-ops.mlir33 …ne of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `Sequentia…
271 …ne of these four memory constraints to be set: `Acquire`, `Release`,`AcquireRelease` or `Sequentia…
H A Dtarget-env.mlir40 // CHECK: spv.AtomicCompareExchangeWeak "Workgroup" "AcquireRelease|AtomicCounterMemory" "Acquire"
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp142 case AtomicOrdering::AcquireRelease: in getLRForRMW32()
159 case AtomicOrdering::AcquireRelease: in getSCForRMW32()
176 case AtomicOrdering::AcquireRelease: in getLRForRMW64()
193 case AtomicOrdering::AcquireRelease: in getSCForRMW64()
/llvm-project-15.0.7/mlir/test/Dialect/SPIRV/Transforms/
H A Dinlining.mlir209 // CHECK: spv.AtomicIAdd "Device" "AcquireRelease" [[STOREPTR]], [[VAL]]
220 %0 = spv.AtomicIAdd "Device" "AcquireRelease" %arg1, %arg0 : !spv.ptr<i32, StorageBuffer>
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DGlobalStatus.cpp36 return AtomicOrdering::AcquireRelease; in strongerOrdering()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIMemoryLegalizer.cpp720 MMO->getFailureOrdering() != AtomicOrdering::AcquireRelease); in constructFromMIWithMMO()
2225 MOI.getOrdering() == AtomicOrdering::AcquireRelease || in expandAtomicFence()
2245 MOI.getOrdering() == AtomicOrdering::AcquireRelease || in expandAtomicFence()
2267 MOI.getOrdering() == AtomicOrdering::AcquireRelease || in expandAtomicCmpxchgOrRmw()
2274 MOI.getOrdering() == AtomicOrdering::AcquireRelease || in expandAtomicCmpxchgOrRmw()
2283 MOI.getOrdering() == AtomicOrdering::AcquireRelease || in expandAtomicCmpxchgOrRmw()
/llvm-project-15.0.7/mlir/lib/Conversion/LinalgToSPIRV/
H A DLinalgToSPIRV.cpp189 spirv::MemorySemantics::AcquireRelease, \ in matchAndRewrite()
/llvm-project-15.0.7/mlir/test/lib/Dialect/SPIRV/
H A DTestAvailability.cpp188 spirv::MemorySemantics::AcquireRelease | in matchAndRewrite()
/llvm-project-15.0.7/mlir/test/Conversion/LinalgToSPIRV/
H A Dlinalg-to-spirv.mlir40 // CHECK: spv.AtomicIAdd "Device" "AcquireRelease" %[[OUTPTR]], %[[ADD]]
/llvm-project-15.0.7/mlir/test/Conversion/GPUToSPIRV/
H A Dsimple.mlir115 // CHECK: spv.ControlBarrier Workgroup, Workgroup, "AcquireRelease|WorkgroupMemory"
/llvm-project-15.0.7/mlir/lib/Conversion/MemRefToSPIRV/
H A DMemRefToSPIRV.cpp507 loc, dstType, adjustedPtr, *scope, spirv::MemorySemantics::AcquireRelease, in matchAndRewrite()
510 loc, dstType, adjustedPtr, *scope, spirv::MemorySemantics::AcquireRelease, in matchAndRewrite()
/llvm-project-15.0.7/mlir/lib/Conversion/GPUToSPIRV/
H A DGPUToSPIRV.cpp357 spirv::MemorySemantics::AcquireRelease); in matchAndRewrite()
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/MCTargetDesc/
H A DSPIRVBaseInfo.h651 AcquireRelease = 0x8, enumerator
H A DSPIRVBaseInfo.cpp913 if (e == static_cast<uint32_t>(MemorySemantics::AcquireRelease)) in getMemorySemanticsName()
915 if (e & static_cast<uint32_t>(MemorySemantics::AcquireRelease)) { in getMemorySemanticsName()
/llvm-project-15.0.7/mlir/lib/Target/LLVMIR/Dialect/LLVMIR/
H A DLLVMToLLVMIRTranslation.cpp141 return llvm::AtomicOrdering::AcquireRelease; in getLLVMAtomicOrdering()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.cpp1322 case AtomicOrdering::AcquireRelease: in legalizeAtomicCmpxchg128()
1363 case AtomicOrdering::AcquireRelease: in legalizeAtomicCmpxchg128()
/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGAtomic.cpp1382 llvm::AtomicOrdering::AcquireRelease, Scope); in EmitAtomicExpr()
1446 llvm::AtomicOrdering::AcquireRelease, Scope); in EmitAtomicExpr()
2097 else if (AO == llvm::AtomicOrdering::AcquireRelease) in EmitAtomicStore()
/llvm-project-15.0.7/llvm/lib/Transforms/Instrumentation/
H A DDataFlowSanitizer.cpp2164 case AtomicOrdering::AcquireRelease: in addAcquireOrdering()
2165 return AtomicOrdering::AcquireRelease; in addAcquireOrdering()
2449 case AtomicOrdering::AcquireRelease: in addReleaseOrdering()
2450 return AtomicOrdering::AcquireRelease; in addReleaseOrdering()

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