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Searched refs:AR1 (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/unittests/ADT/
H A DArrayRefTest.cpp96 ArrayRef<int> AR1(TheNumbers); in TEST() local
103 ArrayRef<int> AR1(TheNumbers); in TEST() local
110 ArrayRef<int> AR1(TheNumbers); in TEST() local
114 EXPECT_EQ(AR1, AR1.drop_while([](const int &N) { return N < 0; })); in TEST()
121 ArrayRef<int> AR1(TheNumbers); in TEST() local
127 EXPECT_EQ(AR1, AR1.drop_until([](const int &N) { return N > 0; })); in TEST()
152 EXPECT_EQ(AR1, AR1.take_while([](const int &N) { return N > 0; })); in TEST()
161 EXPECT_EQ(AR1, AR1.take_until([](const int &N) { return N < 0; })); in TEST()
168 ArrayRef<int> AR1(A1); in TEST() local
236 ArrayRef<int> AR1(A1); in TEST() local
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopIdiom/
H A Dmemset-runtime-64bit.ll20 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
27 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP1]], i1 false)
64 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
72 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP1]], i1 false)
179 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
189 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP1]], i1 false)
229 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
241 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP2]], i1 false)
369 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
380 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[AR1]], i8 0, i64 [[TMP3]], i1 false)
H A Dmemset-runtime-32bit.ll20 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
27 ; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP1]], i1 false)
64 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
72 ; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP1]], i1 false)
179 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
189 ; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP3]], i1 false)
233 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
245 ; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP3]], i1 false)
381 ; CHECK-NEXT: [[AR1:%.*]] = bitcast i32* [[AR:%.*]] to i8*
389 ; CHECK-NEXT: call void @llvm.memset.p0i8.i32(i8* align 4 [[AR1]], i8 0, i32 [[TMP2]], i1 false)
/llvm-project-15.0.7/clang/test/CodeGen/
H A Dext-int.c18 int AR1[A]; variable
/llvm-project-15.0.7/llvm/include/llvm/Analysis/
H A DScalarEvolution.h2229 bool areAddRecsEqualWithPreds(const SCEVAddRecExpr *AR1,
/llvm-project-15.0.7/llvm/lib/Analysis/
H A DScalarEvolution.cpp5532 const SCEVAddRecExpr *AR1, const SCEVAddRecExpr *AR2) const { in areAddRecsEqualWithPreds() argument
5533 if (AR1 == AR2) in areAddRecsEqualWithPreds()
5543 if (!areExprsEqual(AR1->getStart(), AR2->getStart()) || in areAddRecsEqualWithPreds()
5544 !areExprsEqual(AR1->getStepRecurrence(SE), AR2->getStepRecurrence(SE))) in areAddRecsEqualWithPreds()