Home
last modified time | relevance | path

Searched refs:AMT (Results 1 – 8 of 8) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dinreg.ll12 ; DAG: subl $[[AMT:.*]], %esp
18 ; DAG-NEXT: addl $[[AMT]], %esp
22 ; FAST: subl $[[AMT:.*]], %esp
28 ; FAST-NEXT: addl $[[AMT]], %esp
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dcrsave.ll28 ; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
32 ; PPC64: addi 1, 1, [[AMT]]
59 ; PPC64: stdu 1, -[[AMT:[0-9]+]](1)
60 ; PPC64: addi 1, 1, [[AMT]]
/llvm-project-15.0.7/llvm/test/Transforms/AggressiveInstCombine/
H A Dtrunc_lshr.ll35 ; CHECK-NEXT: [[ZA:%.*]] = zext i8 [[AMT:%.*]] to i32
54 ; CHECK-NEXT: [[ZA:%.*]] = zext i8 [[AMT:%.*]] to i16
76 ; CHECK-NEXT: [[SEXT:%.*]] = sext i16 [[AMT:%.*]] to i64
H A Dtrunc_ashr.ll51 ; CHECK-NEXT: [[ZA:%.*]] = zext i8 [[AMT:%.*]] to i32
70 ; CHECK-NEXT: [[ZA:%.*]] = zext i8 [[AMT:%.*]] to i16
92 ; CHECK-NEXT: [[SEXT:%.*]] = sext i16 [[AMT:%.*]] to i64
H A Dtrunc_shl.ll81 ; CHECK-NEXT: [[SEXT:%.*]] = sext i16 [[AMT:%.*]] to i64
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Dshift-i64-opts.ll263 ; GCN: s_and_b32 s[[AMT:[0-9]+]], s{{[0-9]+}}, 30
264 ; GCN: v_lshlrev_b32_e32 v{{[0-9]+}}, s[[AMT]], v{{[0-9]+}}
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Drem.ll251 ; CHECK-NEXT: [[AMT:%.*]] = shl nuw i32 32, [[SHIFT_UPGRD_1]]
252 ; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[AMT]], -1
/llvm-project-15.0.7/llvm/lib/IR/
H A DVerifier.cpp5012 if (const auto *AMT = dyn_cast<AtomicMemTransferInst>(AMI)) { in visitIntrinsicCall() local
5013 uint64_t SrcAlignment = AMT->getSourceAlignment(); in visitIntrinsicCall()