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Searched refs:ADD_VL (Results 1 – 3 of 3) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h219 ADD_VL, enumerator
H A DRISCVISelLowering.cpp2788 Add = DAG.getNode(RISCVISD::ADD_VL, DL, WideIntContainerVT, Add, WidenMul, in lowerVECTOR_SHUFFLE()
3513 return lowerToScalableOp(Op, DAG, RISCVISD::ADD_VL); in LowerOperation()
3610 return lowerVPOp(Op, DAG, RISCVISD::ADD_VL); in LowerOperation()
8266 assert((N->getOpcode() == RISCVISD::ADD_VL || in combineADDSUB_VLToVWADDSUB_VL()
8269 bool IsAdd = N->getOpcode() == RISCVISD::ADD_VL; in combineADDSUB_VLToVWADDSUB_VL()
9236 case RISCVISD::ADD_VL: in PerformDAGCombine()
11686 NODE_NAME_CASE(ADD_VL) in getTargetNodeName()
H A DRISCVInstrInfoVVLPatterns.td64 def riscv_add_vl : SDNode<"RISCVISD::ADD_VL", SDT_RISCVIntBinOp_VL, [SDNPCommutative]>;