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Searched refs:xe_tile_assert (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/xe/
H A Dxe_ggtt.c131 xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK)); in xe_ggtt_set_pte()
132 xe_tile_assert(ggtt->tile, addr < ggtt->size); in xe_ggtt_set_pte()
149 xe_tile_assert(ggtt->tile, start < end); in xe_ggtt_clear()
446 xe_tile_assert(ggtt->tile, start < end); in xe_ggtt_node_insert_balloon()
447 xe_tile_assert(ggtt->tile, IS_ALIGNED(start, XE_PAGE_SIZE)); in xe_ggtt_node_insert_balloon()
448 xe_tile_assert(ggtt->tile, IS_ALIGNED(end, XE_PAGE_SIZE)); in xe_ggtt_node_insert_balloon()
449 xe_tile_assert(ggtt->tile, !drm_mm_node_allocated(&node->base)); in xe_ggtt_node_insert_balloon()
624 xe_tile_assert(ggtt->tile, bo->ggtt_node[tile_id]->base.size == bo->size); in __xe_ggtt_insert_bo_at()
701 xe_tile_assert(ggtt->tile, bo->ggtt_node[tile_id]->base.size == bo->size); in xe_ggtt_remove_bo()
H A Dxe_pcode.c128 xe_tile_assert(tile, timeout_us > 0); in pcode_try_request()
175 xe_tile_assert(tile, timeout_base_ms <= 3); in xe_pcode_request()
H A Dxe_assert.h143 #define xe_tile_assert(tile, condition) xe_tile_assert_msg((tile), condition, "") macro
H A Dxe_mmio.c153 xe_tile_assert(tile, size <= XE_REG_ADDR_MAX); in xe_mmio_init()
293 xe_tile_assert(mmio->tile, reg_udw.addr == reg.addr + 0x4); in xe_mmio_read64_2x32()
H A Dxe_pt.c136 xe_tile_assert(tile, level <= XE_VM_MAX_LEVEL); in xe_pt_create()
1113 xe_tile_assert(tile, *num_entries); in xe_pt_prepare_bind()
1800 xe_tile_assert(tile, !xe_vma_is_cpu_addr_mirror(vma)); in bind_op_prepare()
1818 xe_tile_assert(tile, pt_op->num_entries <= in bind_op_prepare()
1867 xe_tile_assert(tile, xe_vma_is_cpu_addr_mirror(vma)); in bind_range_prepare()
1880 xe_tile_assert(tile, pt_op->num_entries <= in bind_range_prepare()
1912 xe_tile_assert(tile, !xe_vma_is_cpu_addr_mirror(vma)); in unbind_op_prepare()
2102 xe_tile_assert(tile, pt_update_ops->current_op <= in xe_pt_update_ops_prepare()
2120 xe_tile_assert(tile, !xe_vma_is_cpu_addr_mirror(vma)); in bind_op_commit()
2155 xe_tile_assert(tile, !xe_vma_is_cpu_addr_mirror(vma)); in unbind_op_commit()
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H A Dxe_sa.c53 xe_tile_assert(tile, size > guard); in __xe_sa_bo_manager_init()
H A Dxe_migrate.c206 xe_tile_assert(tile, m->batch_base_ofs + batch->size < SZ_2M); in xe_migrate_prepare_vm()
251 xe_tile_assert(tile, batch->size == SZ_1M); in xe_migrate_prepare_vm()
255 xe_tile_assert(tile, batch->size == SZ_512K); in xe_migrate_prepare_vm()
1211 xe_tile_assert(tile, update->qwords < MAX_NUM_PTE); in write_pgtable()
1407 xe_tile_assert(tile, pt_bo->size == SZ_4K); in __xe_migrate_update_pgtables()
1589 xe_tile_assert(m->tile, addr); in build_pt_update_batch_sram()
H A Dxe_memirq.c23 #define memirq_assert(m, condition) xe_tile_assert(memirq_to_tile(m), condition)
H A Dxe_svm.c369 xe_tile_assert(tile, is_device_private_page(page)); in xe_vram_region_page_to_dpa()
370 xe_tile_assert(tile, (pfn << PAGE_SHIFT) >= vr->hpa_base); in xe_vram_region_page_to_dpa()
H A Dxe_lmtt.c33 #define lmtt_assert(lmtt, condition) xe_tile_assert(lmtt_to_tile(lmtt), condition)
H A Dxe_gt_sriov_vf.c636 xe_tile_assert(tile, IS_SRIOV_VF(tile_to_xe(tile))); in deballoon_ggtt()