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/linux-6.15/arch/arm/boot/dts/nxp/imx/
H A Dimx53-sk-imx53-atm0700d4-rgb.dts43 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
44 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
45 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
46 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
47 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
48 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
49 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
50 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
51 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
52 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
[all …]
H A Dimx51-apf51dev.dts183 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
184 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
185 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
186 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
187 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
188 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
189 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
190 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
191 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
207 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
[all …]
H A Dimx53-cx9020.dts256 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
257 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
258 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
259 MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 0x5
260 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
261 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
262 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
263 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
264 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
265 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
[all …]
H A Dimx53-m53evk.dts244 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5
245 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5
246 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5
269 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5
270 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5
271 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5
272 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5
273 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5
274 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5
275 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5
[all …]
H A Dimx51-babbage.dts566 MX51_PAD_EIM_A27__GPIO2_21 0x5
592 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
593 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
594 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
595 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
596 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
616 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
617 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
639 MX51_PAD_DI2_PIN2__DI2_PIN2 0x5
640 MX51_PAD_DI2_PIN3__DI2_PIN3 0x5
[all …]
H A Dimx51-ts4800.dts261 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
262 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
263 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
264 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
265 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
266 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
267 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
268 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
285 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
286 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
[all …]
H A Dimx53-qsb-common.dtsi273 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
274 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
275 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
276 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
277 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
278 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
279 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
280 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
281 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
282 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
[all …]
H A Dimx53-tx53-x03x.dts289 MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 0x5
290 MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 0x5
291 MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 0x5
292 MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 0x5
293 MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 0x5
294 MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 0x5
295 MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 0x5
296 MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 0x5
297 MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 0x5
298 MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 0x5
[all …]
H A Dimx7d-smegw01.dts284 MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x5
285 MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x5
286 MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x5
287 MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x5
288 MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x5
289 MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x5
290 MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x5
291 MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x5
292 MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x5
293 MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x5
[all …]
H A Dimx51-zii-rdu1.dts750 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
751 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
752 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
753 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
754 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
755 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
756 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
757 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
758 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
774 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
[all …]
/linux-6.15/arch/powerpc/boot/dts/fsl/
H A Dmpc8568mds.dts31 0x5 0x0 0xf8010000 0x00008000>;
52 reg = <0x5 0x1>;
156 0x5 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
157 0x5 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
158 0x5 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
159 0x5 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
164 0x5 0xf 0x2 0x0 0x2 0x0 /* RxD0 */
165 0x5 0xe 0x2 0x0 0x2 0x0 /* RxD1 */
180 0x4 0x5 0x1 0x0 0x2 0x0>; /* MDC */
258 0x9000 0x0 0x0 0x1 &mpic 0x5 0x1 0 0
[all …]
/linux-6.15/arch/x86/crypto/
H A Daria-aesni-avx-asm_64.S200 x4, x5, x6, x7, \
291 vpxor t2, x5, x5; \
309 vgf2p8affineinvqb $(tf_s2_const), t0, x5, x5; \
338 vaesenclast t7, x5, x5; \
346 vpshufb t0, x5, x5; \
385 vpxor y1, x5, x5; \
415 vpxor y1, x5, x5; \
420 x4, x5, x6, x7, \ argument
475 x4, x5, x6, x7, \ argument
530 x4, x5, x6, x7, \ argument
[all …]
H A Daria-aesni-avx2-asm_64.S216 x4, x5, x6, x7, \
299 vpxor t0, x5, x5; \
316 vgf2p8affineinvqb $(tf_s2_const), t0, x5, x5; \
358 vaesenclast t7##_x, x5##_x, x5##_x; \
360 vinserti128 $1, t6##_x, x5, x5; \
378 vpshufb t0, x5, x5; \
426 vpxor y1, x5, x5; \
456 vpxor y1, x5, x5; \
461 x4, x5, x6, x7, \ argument
515 x4, x5, x6, x7, \ argument
[all …]
H A Dglue_helper-asm-avx.S8 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
14 vmovdqu (5*16)(src), x5; \
18 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
24 vmovdqu x5, (5*16)(dst); \
28 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
33 vpxor (4*16)(src), x5, x5; \
36 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
H A Dglue_helper-asm-avx2.S8 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
14 vmovdqu (5*32)(src), x5; \
18 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
24 vmovdqu x5, (5*32)(dst); \
28 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument
36 vpxor (4*32+16)(src), x5, x5; \
39 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
H A Dcamellia-aesni-avx-asm_64.S67 vpshufb t4, x5, x5; \
94 vaesenclast t4, x5, x5; \
135 vpxor x5, x0, x0; \
141 vpxor x3, x5, x5; \
147 vpxor x5, x2, x2; \
151 vpxor x0, x5, x5; \
162 vpxor t2, x5, x5; \
163 vpxor 1 * 16(mem_cd), x5, x5; \
219 vmovdqu x5, 1 * 16(mem_cd); \
549 vpxor x0, x5, x5; \
[all …]
H A Dcamellia-aesni-avx2-asm_64.S81 vpshufb t4, x5, x5; \
124 vaesenclast t4##_x, x5##_x, x5##_x; \
126 vinserti128 $1, t5##_x, x5, x5; \
161 vpxor x5, x0, x0; \
173 vpxor x3, x5, x5; \
183 vpxor x5, x2, x2; \
187 vpxor x0, x5, x5; \
212 vpxor t2, x5, x5; \
213 vpxor 1 * 32(mem_cd), x5, x5; \
581 vpxor x0, x5, x5; \
[all …]
/linux-6.15/arch/arm64/lib/
H A Dcrc32.S69 ldp x5, x6, [x8]
70 \order x3, x4, x5, x6
90 crc32\c\()x w8, w0, x5
98 \order x3, x4, x5, x6
168 add x5, x5, x4, lsl #2 // x5 += 12 * x3
169 ldp s0, s1, [x5]
170 ldr s2, [x5, #8]
200 mov v5.d[0], x5
206 mov x5, v0.d[0]
207 eor x5, x5, x17
[all …]
H A Dmte.S73 multitag_transfer_size x5, x6
76 add x2, x2, x5
77 add x3, x3, x5
140 multitag_transfer_size x7, x5
144 ldgm x5, [x0]
145 orr x2, x2, x5
164 multitag_transfer_size x7, x5
/linux-6.15/arch/arm64/crypto/
H A Daes-neonbs-core.S134 eor \x5, \x5, \t1
234 eor \x5\().16b, \x5\().16b, v21.16b
245 tbl \x5\().16b, {\x5\().16b}, \mask\().16b
264 eor \x5\().16b, \x5\().16b, \t5\().16b
280 ext \t1\().16b, \x5\().16b, \x5\().16b, #8
293 eor \x5\().16b, \x5\().16b, \t7\().16b
298 eor \x5\().16b, \x5\().16b, \t7\().16b
332 eor \x5\().16b, \x5\().16b, \t3\().16b
336 eor \x5\().16b, \x5\().16b, \t7\().16b
575 lsl x5, x5, x23
[all …]
H A Dsm4-ce-core.S323 uxtw x5, w5
334 add x6, x6, x5
335 sub x7, x7, x5
340 add x2, x2, x5
352 add x5, x1, x5
371 uxtw x5, w5
398 add x5, x1, x5
545 uxtw x5, w5
672 add x5, x1, x5
712 uxtw x5, w5
[all …]
/linux-6.15/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_msg_arm64.h81 register u64 x5 asm("x5") = in5; in vmware_hypercall5()
90 : "r" (x1), "r" (x3), "r" (x4), "r" (x5), "r" (x7) in vmware_hypercall5()
107 register u64 x5 asm("x5"); in vmware_hypercall6()
115 : "+r" (x0), "+r" (x2), "+r" (x3), "=r" (x4), "=r" (x5) in vmware_hypercall6()
122 *out5 = x5; in vmware_hypercall6()
137 register u64 x5 asm("x5") = in5; in vmware_hypercall7()
146 : "r" (x4), "r" (x5), "r" (x7) in vmware_hypercall7()
166 register u64 x5 asm("x5") = in5; in vmware_hypercall_hb()
176 : "r" (x2), "r" (x3), "r" (x4), "r" (x5), in vmware_hypercall_hb()
/linux-6.15/tools/testing/selftests/arm64/fp/
H A Dsve-test.S117 mov x5, x0
122 mov x1, x5
138 mov x5, x0
143 mov x1, x5
198 mov x5, #0
201 add x5, x5, #1
232 mov x0, x5
257 mov x0, x5
273 lsr x5, x5, #3
276 mov x1, x5
[all …]
H A Dfpsimd-test.S82 mov x5, x0
87 mov x1, x5
100 mov x5, #0
101 0: ldrb w3, [x0, x5]
102 ldrb w4, [x1, x5]
103 add x5, x5, #1
118 _adrv x5, x0, 6
130 mov x0, x5
188 mov x5, x1
198 str x5, [x1, #sa_handler]
/linux-6.15/arch/arm64/kvm/hyp/nvhe/
H A Dhyp-init.S258 mov_q x5, INIT_SCTLR_EL2_MMU_OFF
260 msr sctlr_el2, x5
264 mov_q x5, HCR_HOST_NVHE_FLAGS
265 msr hcr_el2, x5
269 adr_l x5, __hyp_stub_vectors
270 msr vbar_el2, x5
297 phys_to_ttbr x5, x0
299 orr x5, x5, #TTBR_CNP_BIT
301 msr ttbr0_el2, x5

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