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Searched refs:write_sysreg_el1 (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/arch/arm64/kvm/hyp/vhe/
H A Dsysreg-sr.c92 write_sysreg_el1(__vcpu_sys_reg(vcpu, MAIR_EL2), SYS_MAIR); in __sysreg_restore_vel2_state()
93 write_sysreg_el1(__vcpu_sys_reg(vcpu, VBAR_EL2), SYS_VBAR); in __sysreg_restore_vel2_state()
114 write_sysreg_el1(val, SYS_SCTLR); in __sysreg_restore_vel2_state()
116 write_sysreg_el1(val, SYS_CPACR); in __sysreg_restore_vel2_state()
118 write_sysreg_el1(val, SYS_TTBR0); in __sysreg_restore_vel2_state()
120 write_sysreg_el1(val, SYS_TCR); in __sysreg_restore_vel2_state()
127 write_sysreg_el1(__vcpu_sys_reg(vcpu, PIR_EL2), SYS_PIR); in __sysreg_restore_vel2_state()
132 write_sysreg_el1(__vcpu_sys_reg(vcpu, POR_EL2), SYS_POR); in __sysreg_restore_vel2_state()
135 write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2), SYS_ESR); in __sysreg_restore_vel2_state()
138 write_sysreg_el1(__vcpu_sys_reg(vcpu, FAR_EL2), SYS_FAR); in __sysreg_restore_vel2_state()
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H A Dtlb.c45 write_sysreg_el1(val, SYS_TCR); in enter_vmid_context()
48 write_sysreg_el1(val, SYS_SCTLR); in enter_vmid_context()
85 write_sysreg_el1(cxt->tcr, SYS_TCR); in exit_vmid_context()
86 write_sysreg_el1(cxt->sctlr, SYS_SCTLR); in exit_vmid_context()
/linux-6.15/arch/arm64/kvm/hyp/include/hyp/
H A Dsysreg-sr.h190 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
197 write_sysreg_el1((ctxt_sys_reg(ctxt, TCR_EL1) | in __sysreg_restore_el1_state()
210 write_sysreg_el1(ctxt_sys_reg(ctxt, PIR_EL1), SYS_PIR); in __sysreg_restore_el1_state()
215 write_sysreg_el1(ctxt_sys_reg(ctxt, POR_EL1), SYS_POR); in __sysreg_restore_el1_state()
217 write_sysreg_el1(ctxt_sys_reg(ctxt, ESR_EL1), SYS_ESR); in __sysreg_restore_el1_state()
220 write_sysreg_el1(ctxt_sys_reg(ctxt, FAR_EL1), SYS_FAR); in __sysreg_restore_el1_state()
221 write_sysreg_el1(ctxt_sys_reg(ctxt, MAIR_EL1), SYS_MAIR); in __sysreg_restore_el1_state()
222 write_sysreg_el1(ctxt_sys_reg(ctxt, VBAR_EL1), SYS_VBAR); in __sysreg_restore_el1_state()
249 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __sysreg_restore_el1_state()
253 write_sysreg_el1(ctxt_sys_reg(ctxt, ELR_EL1), SYS_ELR); in __sysreg_restore_el1_state()
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H A Dswitch.h543 write_sysreg_el1(val, SYS_SCTLR); in handle_tx2_tvm()
546 write_sysreg_el1(val, SYS_TTBR0); in handle_tx2_tvm()
549 write_sysreg_el1(val, SYS_TTBR1); in handle_tx2_tvm()
552 write_sysreg_el1(val, SYS_TCR); in handle_tx2_tvm()
555 write_sysreg_el1(val, SYS_ESR); in handle_tx2_tvm()
558 write_sysreg_el1(val, SYS_FAR); in handle_tx2_tvm()
561 write_sysreg_el1(val, SYS_AFSR0); in handle_tx2_tvm()
564 write_sysreg_el1(val, SYS_AFSR1); in handle_tx2_tvm()
567 write_sysreg_el1(val, SYS_MAIR); in handle_tx2_tvm()
570 write_sysreg_el1(val, SYS_AMAIR); in handle_tx2_tvm()
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/linux-6.15/arch/arm64/kvm/hyp/nvhe/
H A Ddebug-sr.c35 write_sysreg_el1(0, SYS_PMSCR); in __debug_save_spe()
51 write_sysreg_el1(pmscr_el1, SYS_PMSCR); in __debug_restore_spe()
57 write_sysreg_el1(new_trfcr, SYS_TRFCR); in __trace_do_switch()
H A Dtlb.c88 write_sysreg_el1(val, SYS_TCR); in enter_vmid_context()
95 write_sysreg_el1(val, SYS_SCTLR); in enter_vmid_context()
140 write_sysreg_el1(cxt->sctlr, SYS_SCTLR); in exit_vmid_context()
144 write_sysreg_el1(cxt->tcr, SYS_TCR); in exit_vmid_context()
H A Dswitch.c114 write_sysreg_el1(ctxt_sys_reg(ctxt, SCTLR_EL1), SYS_SCTLR); in __activate_traps()
116 write_sysreg_el1(ctxt_sys_reg(ctxt, TCR_EL1), SYS_TCR); in __activate_traps()
136 write_sysreg_el1(val | TCR_EPD1_MASK | TCR_EPD0_MASK, SYS_TCR); in __deactivate_traps()
139 write_sysreg_el1(val | SCTLR_ELx_M, SYS_SCTLR); in __deactivate_traps()
H A Dsys_regs.c261 write_sysreg_el1(esr, SYS_ESR); in inject_undef64()
262 write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR); in inject_undef64()
H A Dpsci-relay.c221 write_sysreg_el1(INIT_SCTLR_EL1_MMU_OFF, SYS_SCTLR); in __kvm_host_psci_cpu_entry()
H A Dhyp-main.c57 write_sysreg_el1(sve_state->zcr_el1, SYS_ZCR); in __hyp_sve_restore_host()
/linux-6.15/arch/arm64/kvm/
H A Dat.c527 write_sysreg_el1(config->ttbr0, SYS_TTBR0); in __mmu_config_restore()
528 write_sysreg_el1(config->ttbr1, SYS_TTBR1); in __mmu_config_restore()
529 write_sysreg_el1(config->tcr, SYS_TCR); in __mmu_config_restore()
530 write_sysreg_el1(config->mair, SYS_MAIR); in __mmu_config_restore()
532 write_sysreg_el1(config->tcr2, SYS_TCR2); in __mmu_config_restore()
534 write_sysreg_el1(config->pir, SYS_PIR); in __mmu_config_restore()
535 write_sysreg_el1(config->pire0, SYS_PIRE0); in __mmu_config_restore()
538 write_sysreg_el1(config->por_el1, SYS_POR); in __mmu_config_restore()
542 write_sysreg_el1(config->sctlr, SYS_SCTLR); in __mmu_config_restore()
1252 write_sysreg_el1(vcpu_read_sys_reg(vcpu, TCR_EL1), SYS_TCR); in __kvm_at_s1e01_fast()
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H A Dsys_regs.c242 write_sysreg_el1(val, SYS_CNTKCTL); in vcpu_write_sys_reg()
/linux-6.15/arch/arm64/include/asm/
H A Dkvm_hyp.h30 #define write_sysreg_el1(v,r) write_sysreg_s(v, r##_EL12) macro
64 #define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12) macro
/linux-6.15/arch/arm64/kvm/hyp/
H A Dexception.c52 write_sysreg_el1(val, SYS_SPSR); in __vcpu_write_spsr()