Home
last modified time | relevance | path

Searched refs:wr32 (Results 1 – 25 of 110) sorted by relevance

12345

/linux-6.15/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_mac.c24 wr32(fbd, offset, val); in fbnic_init_readrq()
38 wr32(fbd, offset, val); in fbnic_init_mps()
72 wr32(fbd, FBNIC_QM_TNI_TDE_CTL, in fbnic_mac_init_axi()
89 wr32(fbd, FBNIC_QM_TQS_CTL0, in fbnic_mac_init_qm()
104 wr32(fbd, FBNIC_QM_TQS_MTU_CTL1, in fbnic_mac_init_qm()
114 wr32(fbd, FBNIC_QM_TCQ_CTL0, in fbnic_mac_init_qm()
123 wr32(fbd, FBNIC_QM_RCQ_CTL0, in fbnic_mac_init_qm()
197 wr32(fbd, FBNIC_RXB_CT_SIZE(i), in fbnic_mac_init_rxb()
263 wr32(fbd, FBNIC_RXB_INTF_CREDIT, in fbnic_mac_init_rxb()
307 wr32(fbd, FBNIC_QM_TQS_CTL1, in fbnic_mac_init_txb()
[all …]
H A Dfbnic_rpc.c57 wr32(fbd, FBNIC_RPC_RMI_CONFIG, in fbnic_rss_disable_hw()
94 wr32(fbd, FBNIC_RPC_ACT_TBL1_DEFAULT, 0); in fbnic_rss_reinit_hw()
97 wr32(fbd, FBNIC_RPC_RMI_CONFIG, in fbnic_rss_reinit_hw()
548 wr32(fbd, FBNIC_RPC_TCAM_MACDA(idx, i), in fbnic_write_macda_entry()
627 wr32(fbd, FBNIC_TCE_RAM_TCAM(idx, i), in fbnic_write_tce_tcam_entry()
906 wr32(fbd, FBNIC_RPC_TCAM_IPSRC(idx, i), in fbnic_write_ip_src_entry()
912 wr32(fbd, FBNIC_RPC_TCAM_IPSRC(idx, i), in fbnic_write_ip_src_entry()
926 wr32(fbd, FBNIC_RPC_TCAM_IPDST(idx, i), in fbnic_write_ip_dst_entry()
932 wr32(fbd, FBNIC_RPC_TCAM_IPDST(idx, i), in fbnic_write_ip_dst_entry()
1081 wr32(fbd, FBNIC_RPC_ACT_TBL1(i), 0); in fbnic_clear_rules()
[all …]
/linux-6.15/drivers/net/ethernet/intel/igc/
H A Digc_tsn.c88 wr32(IGC_GTXOFFSET, txoffset); in igc_tsn_adjust_txtime_offset()
97 wr32(IGC_RETX_CTL, retxctl); in igc_tsn_restore_retx_default()
125 wr32(IGC_TXARB, txarb); in igc_tsn_tx_arb()
138 wr32(IGC_GTXOFFSET, 0); in igc_tsn_disable_offload()
152 wr32(IGC_TXQCTL(i), 0); in igc_tsn_disable_offload()
153 wr32(IGC_STQT(i), 0); in igc_tsn_disable_offload()
157 wr32(IGC_QBVCYCLET_S, 0); in igc_tsn_disable_offload()
201 wr32(IGC_TSAUXC, 0); in igc_tsn_enable_offload()
345 wr32(IGC_TQAVHC(i), in igc_tsn_enable_offload()
358 wr32(IGC_TQAVHC(i), 0); in igc_tsn_enable_offload()
[all …]
H A Digc_base.c32 wr32(IGC_IMC, 0xffffffff); in igc_reset_hw_base()
34 wr32(IGC_RCTL, 0); in igc_reset_hw_base()
35 wr32(IGC_TCTL, IGC_TCTL_PSP); in igc_reset_hw_base()
55 wr32(IGC_IMC, 0xffffffff); in igc_reset_hw_base()
119 wr32(IGC_CTRL, ctrl); in igc_setup_copper_link_base()
344 wr32(IGC_RFCTL, rfctl); in igc_rx_fifo_flush_base()
352 wr32(IGC_RXDCTL(i), in igc_rx_fifo_flush_base()
375 wr32(IGC_RLPML, 0); in igc_rx_fifo_flush_base()
391 wr32(IGC_RCTL, rctl); in igc_rx_fifo_flush_base()
394 wr32(IGC_RLPML, rlpml); in igc_rx_fifo_flush_base()
[all …]
H A Digc_ptp.c68 wr32(IGC_TIMINCA, inca); in igc_ptp_adjfine_i225()
205 wr32(IGC_TSSDP, tssdp); in igc_pin_perout()
206 wr32(IGC_CTRL, ctrl); in igc_pin_perout()
242 wr32(IGC_CTRL, ctrl); in igc_pin_extts()
298 wr32(IGC_TSIM, tsim); in igc_ptp_feature_enable_i225()
390 wr32(freqout, ns); in igc_ptp_feature_enable_i225()
395 wr32(IGC_TSIM, tsim); in igc_ptp_feature_enable_i225()
407 wr32(IGC_TSIM, tsim); in igc_ptp_feature_enable_i225()
520 wr32(IGC_RXPBS, val); in igc_ptp_disable_rx_timestamp()
531 wr32(IGC_RXPBS, val); in igc_ptp_enable_rx_timestamp()
[all …]
H A Digc_diag.c46 wr32(reg, test_pattern[pat] & write); in reg_pattern_test()
53 wr32(reg, before); in reg_pattern_test()
56 wr32(reg, before); in reg_pattern_test()
68 wr32(reg, write & mask); in reg_set_and_check()
75 wr32(reg, before); in reg_set_and_check()
78 wr32(reg, before); in reg_set_and_check()
97 wr32(IGC_STATUS, toggle); in igc_reg_test()
107 wr32(IGC_STATUS, before); in igc_reg_test()
H A Digc_mac.c29 wr32(IGC_CTRL, ctrl); in igc_disable_pcie_master()
103 wr32(IGC_FCRTL, fcrtl); in igc_set_fc_watermarks()
104 wr32(IGC_FCRTH, fcrth); in igc_set_fc_watermarks()
154 wr32(IGC_FCT, FLOW_CONTROL_TYPE); in igc_setup_link()
156 wr32(IGC_FCAL, FLOW_CONTROL_ADDRESS_LOW); in igc_setup_link()
158 wr32(IGC_FCTTV, hw->fc.pause_time); in igc_setup_link()
223 wr32(IGC_CTRL, ctrl); in igc_force_mac_fc()
341 wr32(IGC_RAL(index), rar_low); in igc_rar_set()
343 wr32(IGC_RAH(index), rar_high); in igc_rar_set()
430 wr32(IGC_TCTL, tctl); in igc_config_collision_dist()
[all …]
H A Digc_i225.c83 wr32(IGC_SWSM, swsm | IGC_SWSM_SWESMBI); in igc_get_hw_semaphore_i225()
141 wr32(IGC_SW_FW_SYNC, swfw_sync); in igc_acquire_swfw_sync_i225()
172 wr32(IGC_SW_FW_SYNC, swfw_sync); in igc_release_swfw_sync_i225()
249 wr32(IGC_SRWR, eewr); in igc_write_nvm_srwr()
384 wr32(IGC_EECD, flup); in igc_update_flash_i225()
545 wr32(IGC_IPCNFG, ipcnfg); in igc_set_eee_i225()
546 wr32(IGC_EEER, eeer); in igc_set_eee_i225()
578 wr32(IGC_LTRC, ltrc); in igc_set_ltr_i225()
629 wr32(IGC_LTRMINV, ltrv); in igc_set_ltr_i225()
636 wr32(IGC_LTRMAXV, ltrv); in igc_set_ltr_i225()
/linux-6.15/drivers/net/ethernet/wangxun/libwx/
H A Dwx_hw.c25 wr32(wx, WX_MSCA, command); in wx_phy_read_reg_mdi()
30 wr32(wx, WX_MSCC, command); in wx_phy_read_reg_mdi()
54 wr32(wx, WX_MSCA, command); in wx_phy_write_reg_mdi()
59 wr32(wx, WX_MSCC, command); in wx_phy_write_reg_mdi()
113 wr32(wx, WX_PX_IMS(0), mask); in wx_intr_disable()
120 wr32(wx, WX_PX_IMS(1), mask); in wx_intr_disable()
133 wr32(wx, WX_PX_IMC(0), mask); in wx_intr_enable()
156 wr32(wx, WX_PX_MISC_IEN, 0); in wx_irq_disable()
183 wr32(wx, WX_SPI_CMD, cmd_val); in wx_fmgr_cmd_op()
1982 wr32(wx, WX_BME_CTL, 0x3); in wx_stop_adapter()
[all …]
/linux-6.15/drivers/net/ethernet/wangxun/txgbe/
H A Dtxgbe_fdir.c214 wr32(wx, TXGBE_RDB_FDIR_CMD, fdircmd); in txgbe_fdir_add_signature_filter()
384 wr32(wx, TXGBE_RDB_FDIR_SA4_MSK, in txgbe_fdir_set_input_mask()
386 wr32(wx, TXGBE_RDB_FDIR_DA4_MSK, in txgbe_fdir_set_input_mask()
416 wr32(wx, TXGBE_RDB_FDIR_PORT, fdirport); in txgbe_fdir_write_perfect_filter()
422 wr32(wx, TXGBE_RDB_FDIR_FLEX, fdirvlan); in txgbe_fdir_write_perfect_filter()
428 wr32(wx, TXGBE_RDB_FDIR_HASH, fdirhash); in txgbe_fdir_write_perfect_filter()
445 wr32(wx, TXGBE_RDB_FDIR_CMD, fdircmd); in txgbe_fdir_write_perfect_filter()
463 wr32(wx, TXGBE_RDB_FDIR_HASH, fdirhash); in txgbe_fdir_erase_perfect_filter()
480 wr32(wx, TXGBE_RDB_FDIR_HASH, fdirhash); in txgbe_fdir_erase_perfect_filter()
482 wr32(wx, TXGBE_RDB_FDIR_CMD, in txgbe_fdir_erase_perfect_filter()
[all …]
H A Dtxgbe_hw.c61 wr32(wx, TXGBE_TS_CTL, TXGBE_TS_CTL_EVAL_MD); in txgbe_init_thermal_sensor_thresh()
63 wr32(wx, WX_TS_INT_EN, in txgbe_init_thermal_sensor_thresh()
65 wr32(wx, WX_TS_EN, WX_TS_EN_ENA); in txgbe_init_thermal_sensor_thresh()
68 wr32(wx, WX_TS_ALARM_THRE, 677); in txgbe_init_thermal_sensor_thresh()
70 wr32(wx, WX_TS_DALARM_THRE, 614); in txgbe_init_thermal_sensor_thresh()
195 wr32(wx, WX_MIS_RST, val | rd32(wx, WX_MIS_RST)); in txgbe_reset_hw()
207 wr32(wx, TXGBE_PX_PF_BME, 0x1); in txgbe_reset_hw()
/linux-6.15/drivers/net/ethernet/intel/igb/
H A Digb_ptp.c418 wr32(E1000_TSSDP, tssdp); in igb_pin_extts()
419 wr32(E1000_CTRL, ctrl); in igb_pin_extts()
485 wr32(E1000_CTRL, ctrl); in igb_pin_perout()
543 wr32(E1000_TSIM, tsim); in igb_ptp_feature_enable_82580()
636 wr32(E1000_TSIM, tsim); in igb_ptp_feature_enable_82580()
699 wr32(E1000_TSIM, tsim); in igb_ptp_feature_enable_i210()
768 wr32(freqout, ns); in igb_ptp_feature_enable_i210()
773 wr32(E1000_TSIM, tsim); in igb_ptp_feature_enable_i210()
785 wr32(E1000_TSIM, tsim); in igb_ptp_feature_enable_i210()
1269 wr32(E1000_IMIREXT(3), in igb_ptp_set_timestamp_mode()
[all …]
H A De1000_82575.c1469 wr32(E1000_RCTL, 0); in igb_reset_hw_82575()
1575 wr32(E1000_CTRL, ctrl); in igb_setup_copper_link_82575()
1687 wr32(E1000_CONNSW, reg); in igb_setup_serdes_link_82575()
1951 wr32(E1000_RFCTL, rfctl); in igb_rx_fifo_flush_82575()
1960 wr32(E1000_RXDCTL(i), in igb_rx_fifo_flush_82575()
1983 wr32(E1000_RLPML, 0); in igb_rx_fifo_flush_82575()
1999 wr32(E1000_RCTL, rctl); in igb_rx_fifo_flush_82575()
2056 wr32(E1000_GCR, gcr); in igb_set_pcie_completion_timeout()
2276 wr32(E1000_RCTL, 0); in igb_reset_hw_82580()
2293 wr32(E1000_CTRL, ctrl); in igb_reset_hw_82580()
[all …]
H A De1000_mac.c243 wr32(E1000_VLVF(vlvf_index), 0); in igb_vfta_set()
377 wr32(E1000_RAL(index), rar_low); in igb_rar_set()
379 wr32(E1000_RAH(index), rar_high); in igb_rar_set()
746 wr32(E1000_TCTL, tctl); in igb_config_collision_dist()
779 wr32(E1000_FCRTL, fcrtl); in igb_set_fc_watermarks()
780 wr32(E1000_FCRTH, fcrth); in igb_set_fc_watermarks()
884 wr32(E1000_CTRL, ctrl); in igb_force_mac_fc()
1325 wr32(E1000_SWSM, swsm); in igb_put_hw_semaphore()
1514 wr32(E1000_LEDCTL, ledctl_blink); in igb_blink_led()
1560 wr32(E1000_CTRL, ctrl); in igb_disable_pcie_master()
[all …]
H A De1000_i210.c148 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_acquire_swfw_sync_i210()
172 wr32(E1000_SW_FW_SYNC, swfw_sync); in igb_release_swfw_sync_i210()
250 wr32(E1000_SRWR, eewr); in igb_write_nvm_srwr()
680 wr32(E1000_EECD, flup); in igb_update_flash_i210()
837 wr32(E1000_MDICNFG, reg_val); in igb_pll_workaround_i210()
863 wr32(E1000_CTRL_EXT, ctrl_ext); in igb_pll_workaround_i210()
865 wr32(E1000_WUC, 0); in igb_pll_workaround_i210()
867 wr32(E1000_EEARBC_I210, reg_val); in igb_pll_workaround_i210()
876 wr32(E1000_EEARBC_I210, reg_val); in igb_pll_workaround_i210()
879 wr32(E1000_WUC, wuc); in igb_pll_workaround_i210()
[all …]
H A Digb_main.c1473 wr32(E1000_IAM, 0); in igb_irq_disable()
1474 wr32(E1000_IMC, ~0); in igb_irq_disable()
1553 wr32(E1000_CTRL_EXT, in igb_release_hw_control()
1572 wr32(E1000_CTRL_EXT, in igb_get_hw_control()
2368 wr32(E1000_VFRE, 0); in igb_reset()
2369 wr32(E1000_VFTE, 0); in igb_reset()
2374 wr32(E1000_WUC, 0); in igb_reset()
4676 wr32(reg, val); in igb_set_vf_vlan_strip()
6613 wr32(E1000_EICS, in igb_tx_timeout()
9486 wr32(E1000_WUC, 0); in __igb_shutdown()
[all …]
H A De1000_mbx.c249 wr32(E1000_MBVFICR, mask); in igb_check_for_bit_pf()
307 wr32(E1000_VFLRE, BIT(vf_number)); in igb_check_for_rst_pf()
329 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_PFU); in igb_obtain_mbx_lock_pf()
357 wr32(E1000_P2VMAILBOX(vf_number), in igb_release_mbx_lock_pf()
392 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_STS); in igb_write_mbx_pf()
431 wr32(E1000_P2VMAILBOX(vf_number), E1000_P2VMAILBOX_ACK); in igb_read_mbx_pf()
433 wr32(E1000_P2VMAILBOX(vf_number), in igb_read_mbx_pf()
/linux-6.15/drivers/net/ethernet/intel/i40e/
H A Di40e_ptp.c376 wr32(hw, I40E_PRTTSYN_AUX_0(1), 0); in i40e_ptp_set_1pps_signal_hw()
391 wr32(hw, I40E_PRTTSYN_AUX_0(1), in i40e_ptp_set_1pps_signal_hw()
424 wr32(hw, I40E_PRTTSYN_ADJ, timadj); in i40e_ptp_adjtime()
966 wr32(hw, I40E_GLGEN_GPIO_CTL(pin), in i40e_ptp_set_pin_hw()
970 wr32(hw, I40E_GLGEN_GPIO_CTL(pin), in i40e_ptp_set_pin_hw()
974 wr32(hw, I40E_GLGEN_GPIO_CTL(pin), in i40e_ptp_set_pin_hw()
978 wr32(hw, I40E_GLGEN_GPIO_CTL(pin), in i40e_ptp_set_pin_hw()
1000 wr32(hw, I40E_GLGEN_GPIO_SET, in i40e_ptp_set_led_hw()
1004 wr32(hw, I40E_GLGEN_GPIO_SET, in i40e_ptp_set_led_hw()
1186 wr32(hw, I40E_PRTTSYN_CTL0, regval); in i40e_ptp_set_timestamp_mode()
[all …]
H A Di40e_hmc.h112 wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
113 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
114 wr32((hw), I40E_PFHMC_SDCMD, val3); \
131 wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
132 wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
133 wr32((hw), I40E_PFHMC_SDCMD, val3); \
143 wr32((hw), I40E_PFHMC_PDINV, \
H A Di40e_adminq.c236 wr32(hw, I40E_PF_ATQH, 0); in i40e_config_asq_regs()
237 wr32(hw, I40E_PF_ATQT, 0); in i40e_config_asq_regs()
265 wr32(hw, I40E_PF_ARQH, 0); in i40e_config_arq_regs()
266 wr32(hw, I40E_PF_ARQT, 0); in i40e_config_arq_regs()
421 wr32(hw, I40E_PF_ATQH, 0); in i40e_shutdown_asq()
422 wr32(hw, I40E_PF_ATQT, 0); in i40e_shutdown_asq()
423 wr32(hw, I40E_PF_ATQLEN, 0); in i40e_shutdown_asq()
424 wr32(hw, I40E_PF_ATQBAL, 0); in i40e_shutdown_asq()
425 wr32(hw, I40E_PF_ATQBAH, 0); in i40e_shutdown_asq()
455 wr32(hw, I40E_PF_ARQH, 0); in i40e_shutdown_arq()
[all …]
H A Di40e_dcb.c1296 wr32(hw, I40E_PRTDCB_RETSC, reg); in i40e_dcb_hw_rx_fifo_config()
1356 wr32(hw, I40E_PRTDCB_RPPMC, reg); in i40e_dcb_hw_rx_cmd_monitor_config()
1458 wr32(hw, I40E_PRTDCB_RUP, reg); in i40e_dcb_hw_pfc_config()
1466 wr32(hw, I40E_PRTDCB_TDPMC, reg); in i40e_dcb_hw_pfc_config()
1474 wr32(hw, I40E_PRTDCB_TCPMC, reg); in i40e_dcb_hw_pfc_config()
1490 wr32(hw, I40E_PRTDCB_GENC, reg); in i40e_dcb_hw_set_num_tc()
1660 wr32(hw, I40E_PRTRPB_SLW, reg); in i40e_dcb_hw_rx_pb_config()
1695 wr32(hw, I40E_PRTRPB_SHW, reg); in i40e_dcb_hw_rx_pb_config()
1737 wr32(hw, I40E_PRTRPB_SPS, reg); in i40e_dcb_hw_rx_pb_config()
1746 wr32(hw, I40E_PRTRPB_SLW, reg); in i40e_dcb_hw_rx_pb_config()
[all …]
/linux-6.15/drivers/net/ethernet/intel/iavf/
H A Diavf_adminq.c241 wr32(hw, IAVF_VF_ATQH1, 0); in iavf_config_asq_regs()
242 wr32(hw, IAVF_VF_ATQT1, 0); in iavf_config_asq_regs()
270 wr32(hw, IAVF_VF_ARQH1, 0); in iavf_config_arq_regs()
271 wr32(hw, IAVF_VF_ARQT1, 0); in iavf_config_arq_regs()
437 wr32(hw, IAVF_VF_ATQH1, 0); in iavf_shutdown_asq()
438 wr32(hw, IAVF_VF_ATQT1, 0); in iavf_shutdown_asq()
439 wr32(hw, IAVF_VF_ATQLEN1, 0); in iavf_shutdown_asq()
440 wr32(hw, IAVF_VF_ATQBAL1, 0); in iavf_shutdown_asq()
441 wr32(hw, IAVF_VF_ATQBAH1, 0); in iavf_shutdown_asq()
471 wr32(hw, IAVF_VF_ARQH1, 0); in iavf_shutdown_arq()
[all …]
/linux-6.15/drivers/net/ethernet/wangxun/ngbe/
H A Dngbe_main.c147 wr32(wx, WX_GPIO_DDR, WX_GPIO_DDR_0); in ngbe_irq_enable()
149 wr32(wx, WX_GPIO_INTTYPE_LEVEL, 0x0); in ngbe_irq_enable()
150 wr32(wx, WX_GPIO_POLARITY, wx->gpio_ctrl ? 0 : 0x3); in ngbe_irq_enable()
152 wr32(wx, WX_PX_MISC_IEN, mask); in ngbe_irq_enable()
187 wr32(wx, WX_PX_INTA, 1); in ngbe_intr()
454 wr32(wx, NGBE_PSR_WKUP_CTL, wufc); in ngbe_dev_shutdown()
456 wr32(wx, NGBE_PSR_WKUP_CTL, 0); in ngbe_dev_shutdown()
651 wr32(wx, NGBE_CALSUM_CAP_STATUS, 0x0); in ngbe_probe()
652 wr32(wx, NGBE_EEPROM_VERSION_STORE_REG, 0x0); in ngbe_probe()
674 wr32(wx, NGBE_PSR_WKUP_CTL, wx->wol); in ngbe_probe()
[all …]
H A Dngbe_mdio.c29 wr32(wx, NGBE_PHY_CONFIG(regnum), value); in ngbe_phy_write_reg_internal()
104 wr32(wx, WX_MAC_TX_CFG, reg); in ngbe_mac_link_up()
108 wr32(wx, WX_MAC_RX_CFG, reg); in ngbe_mac_link_up()
109 wr32(wx, WX_MAC_PKT_FLT, WX_MAC_PKT_FLT_PR); in ngbe_mac_link_up()
111 wr32(wx, WX_MAC_WDG_TIMEOUT, reg); in ngbe_mac_link_up()
/linux-6.15/drivers/net/ethernet/intel/ice/
H A Dice_sriov.c102 wr32(hw, VPINT_ALLOC(vf->vf_id), 0); in ice_dis_vf_mappings()
103 wr32(hw, VPINT_ALLOC_PCI(vf->vf_id), 0); in ice_dis_vf_mappings()
112 wr32(hw, GLINT_VECT2FUNC(v), reg); in ice_dis_vf_mappings()
116 wr32(hw, VPLAN_TX_QBASE(vf->vf_id), 0); in ice_dis_vf_mappings()
121 wr32(hw, VPLAN_RX_QBASE(vf->vf_id), 0); in ice_dis_vf_mappings()
251 wr32(hw, VPINT_ALLOC(vf->vf_id), reg); in ice_ena_vf_msix_mappings()
256 wr32(hw, VPINT_ALLOC_PCI(vf->vf_id), reg); in ice_ena_vf_msix_mappings()
262 wr32(hw, GLINT_VECT2FUNC(v), reg); in ice_ena_vf_msix_mappings()
296 wr32(hw, VPLAN_TX_QBASE(vf->vf_id), reg); in ice_ena_vf_q_mappings()
592 wr32(hw, PF_PCI_CIAA, in ice_sriov_trigger_reset_register()
[all …]

12345