Home
last modified time | relevance | path

Searched refs:wb_gpu_addr (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v7_0.c907 uint64_t wb_gpu_addr; in sdma_v7_0_mqd_init() local
918 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v7_0_mqd_init()
919 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
920 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
922 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v7_0_mqd_init()
923 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
924 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
H A Dsdma_v6_0.c860 uint64_t wb_gpu_addr; in sdma_v6_0_mqd_init() local
871 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
872 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
873 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
875 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v6_0_mqd_init()
876 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
877 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
H A Dmes_v11_0.c1083 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v11_0_mqd_init() local
1128 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v11_0_mqd_init()
1129 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v11_0_mqd_init()
1131 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
1134 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
1135 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v11_0_mqd_init()
1136 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
H A Dsdma_v5_2.c850 uint64_t wb_gpu_addr; in sdma_v5_2_mqd_init() local
864 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
865 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
866 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
868 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_2_mqd_init()
869 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
870 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
H A Dmes_v12_0.c1169 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v12_0_mqd_init() local
1212 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v12_0_mqd_init()
1213 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v12_0_mqd_init()
1215 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
1218 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_0_mqd_init()
1219 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v12_0_mqd_init()
1220 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
H A Dsdma_v5_0.c993 uint64_t wb_gpu_addr; in sdma_v5_0_mqd_init() local
1007 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
1008 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
1009 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
1011 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_0_mqd_init()
1012 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
1013 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
H A Dgfx_v12_0.c2892 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v12_0_gfx_mqd_init() local
2933 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
2934 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
2936 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
2939 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
2940 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
3023 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v12_0_compute_mqd_init() local
3097 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
3100 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_compute_mqd_init()
3103 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
[all …]
H A Dgfx_v11_0.c4008 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v11_0_gfx_mqd_init() local
4046 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4047 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4049 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4052 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4053 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4136 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v11_0_compute_mqd_init() local
4211 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
4214 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_compute_mqd_init()
4217 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
[all …]
H A Dgfx_v7_0.c2826 u64 wb_gpu_addr; in gfx_v7_0_mqd_init() local
2881 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()
2882 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2883 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
2886 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v7_0_mqd_init()
2887 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2889 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
H A Dgfx_v9_4_3.c1781 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_4_3_xcc_mqd_init() local
1869 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v9_4_3_xcc_mqd_init()
1870 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init()
1872 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_4_3_xcc_mqd_init()
1875 wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v9_4_3_xcc_mqd_init()
1876 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init()
1877 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_4_3_xcc_mqd_init()
H A Dgfx_v9_4_2.c351 u32 compute_dim_x, u64 wb_gpu_addr, u32 pattern, in gfx_v9_4_2_run_shader() argument
399 ib->ptr[ib->length_dw++] = lower_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
400 ib->ptr[ib->length_dw++] = upper_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
H A Dgfx_v10_0.c6728 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v10_0_gfx_mqd_init() local
6766 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6767 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6769 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_gfx_mqd_init()
6772 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6773 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6872 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v10_0_compute_mqd_init() local
6950 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
6953 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_compute_mqd_init()
6956 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
[all …]
H A Dgfx_v8_0.c4425 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v8_0_mqd_init() local
4488 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v8_0_mqd_init()
4489 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()
4491 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_mqd_init()
4494 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
4495 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()
4496 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c3525 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_0_mqd_init() local
3614 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v9_0_mqd_init()
3615 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3617 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
3620 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
3621 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3622 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dcik.c4516 u64 wb_gpu_addr; in cik_cp_compute_resume() local
4677 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP1_WPTR_OFFSET; in cik_cp_compute_resume()
4679 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP2_WPTR_OFFSET; in cik_cp_compute_resume()
4680 mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4681 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()
4688 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET; in cik_cp_compute_resume()
4690 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET; in cik_cp_compute_resume()
4691 mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4693 upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()