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Searched refs:wa (Results 1 – 25 of 35) sorted by relevance

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/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_workarounds.c137 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) in wal_get_fw_for_rmw()
184 if ((wa->clr | wa_->clr) && !(wa->clr & ~wa_->clr)) { in _wa_add()
203 *wa_ = *wa; in _wa_add()
999 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) { in intel_engine_emit_ctx_wa()
1003 if (wa->masked_reg || (wa->clr | wa->set) == U32_MAX) { in intel_engine_emit_ctx_wa()
1720 if ((cur ^ wa->set) & wa->read) { in wa_verify()
1724 cur, cur & wa->read, wa->set & wa->read); in wa_verify()
1758 val = (old & ~wa->clr) | wa->set; in wa_list_apply()
1802 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) in wa_list_verify()
1803 ok &= wa_verify(wal->gt, wa, wa->is_mcr ? in wa_list_verify()
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H A Dselftest_workarounds.c1041 const struct i915_wa *wa = &engine->whitelist.list[i]; in check_whitelisted_registers() local
1043 if (i915_mmio_reg_offset(wa->reg) & in check_whitelisted_registers()
1047 if (!fn(engine, a[i], b[i], wa->reg)) in check_whitelisted_registers()
/linux-6.15/drivers/crypto/ccp/
H A Dccp-ops.c67 dma_unmap_sg(wa->dma_dev, wa->dma_sg_head, wa->nents, wa->dma_dir); in ccp_sg_free()
76 memset(wa, 0, sizeof(*wa)); in ccp_init_sg_workarea()
78 wa->sg = sg; in ccp_init_sg_workarea()
116 if (wa->sg_used == sg_dma_len(wa->dma_sg)) { in ccp_update_sg_workarea()
118 wa->dma_sg = sg_next(wa->dma_sg); in ccp_update_sg_workarea()
128 wa->sg = sg_next(wa->sg); in ccp_update_sg_workarea()
139 dma_pool_free(wa->dma_pool, wa->address, in ccp_dm_free()
143 dma_unmap_single(wa->dev, wa->dma.address, wa->length, in ccp_dm_free()
157 memset(wa, 0, sizeof(*wa)); in ccp_init_dm_workarea()
180 wa->dma.address = dma_map_single(wa->dev, wa->address, len, in ccp_init_dm_workarea()
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/linux-6.15/drivers/accel/ivpu/
H A Divpu_hw.c61 vdev->wa.punit_disabled = false; in wa_init()
62 vdev->wa.clear_runtime_mem = false; in wa_init()
65 vdev->wa.interrupt_clear_with_0 = ivpu_hw_btrs_irqs_clear_with_0_mtl(vdev); in wa_init()
69 vdev->wa.disable_clock_relinquish = true; in wa_init()
72 vdev->wa.disable_clock_relinquish = false; in wa_init()
75 vdev->wa.disable_clock_relinquish = true; in wa_init()
78 vdev->wa.wp0_during_power_up = true; in wa_init()
81 vdev->wa.disable_d0i2 = true; in wa_init()
H A Divpu_drv.h100 #define IVPU_WA(wa_name) (vdev->wa.wa_name)
130 struct ivpu_wa_table wa; member
H A Divpu_fw.c285 vdev->wa.disable_d0i3_msg = true; in ivpu_fw_init_wa()
289 vdev->wa.disable_d0i3_msg = false; in ivpu_fw_init_wa()
/linux-6.15/scripts/
H A Dkallsyms.c669 int wa, wb; in compare_symbols() local
678 wa = (sa->sym[0] == 'w') || (sa->sym[0] == 'W'); in compare_symbols()
680 if (wa != wb) in compare_symbols()
681 return wa - wb; in compare_symbols()
684 wa = may_be_linker_script_provide_symbol(sa); in compare_symbols()
686 if (wa != wb) in compare_symbols()
687 return wa - wb; in compare_symbols()
690 wa = strspn(sym_name(sa), "_"); in compare_symbols()
692 if (wa != wb) in compare_symbols()
693 return wa - wb; in compare_symbols()
/linux-6.15/drivers/clocksource/
H A Darm_arch_timer.c529 return of_property_read_bool(np, wa->id); in arch_timer_check_dt_erratum()
536 return this_cpu_has_cap((uintptr_t)wa->id); in arch_timer_check_local_cap_erratum()
545 const struct ate_acpi_oem_info *info = wa->id; in arch_timer_check_acpi_oem_erratum()
592 if (wa->read_cntvct_el0 || wa->read_cntpct_el0) in arch_timer_enable_workaround()
601 if (wa->read_cntvct_el0) { in arch_timer_enable_workaround()
633 wa = arch_timer_iterate_errata(type, match_fn, arg); in arch_timer_check_ool_workaround()
634 if (!wa) in arch_timer_check_ool_workaround()
638 if (__wa && wa != __wa) in arch_timer_check_ool_workaround()
640 wa->desc, __wa->desc); in arch_timer_check_ool_workaround()
645 arch_timer_enable_workaround(wa, local); in arch_timer_check_ool_workaround()
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/linux-6.15/drivers/media/pci/zoran/
H A Dzoran_device.c233 unsigned int wa, we, ha, he; in zr36057_set_vfe() local
239 wa = tvn->wa; in zr36057_set_vfe()
246 video_width > wa || video_height > ha) { in zr36057_set_vfe()
255 X = DIV_ROUND_UP(vid_win_wid * 64, tvn->wa); in zr36057_set_vfe()
258 hcrop1 = 2 * ((tvn->wa - we) / 4); in zr36057_set_vfe()
259 hcrop2 = tvn->wa - we - hcrop1; in zr36057_set_vfe()
269 h_end = h_start + tvn->wa - 1; in zr36057_set_vfe()
H A Dvideocodec.h222 u16 wt, wa, h_start, h_sync_start, ht, ha, v_start; member
H A Dzoran.h51 #define BUZ_MAX_WIDTH (zr->timing->wa)
H A Dzr36060.c574 reg += norm->wa; /* BHend */ in zr36060_set_video()
608 reg += norm->wa + 8; /* SHend */ in zr36060_set_video()
/linux-6.15/drivers/gpu/drm/i915/
H A Di915_debugfs.c471 const struct i915_wa *wa; in i915_wa_registers() local
481 for (wa = wal->list; count--; wa++) in i915_wa_registers()
483 i915_mmio_reg_offset(wa->reg), in i915_wa_registers()
484 wa->set, wa->clr); in i915_wa_registers()
/linux-6.15/drivers/net/wireless/broadcom/b43/
H A DMakefile4 b43-$(CONFIG_B43_PHY_G) += phy_g.o tables.o lo.o wa.o
/linux-6.15/drivers/gpu/drm/amd/display/dc/
H A Ddc_ddc_types.h187 union ddc_wa wa; member
/linux-6.15/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_ads.c381 struct i915_wa *wa; in guc_mmio_regset_init() local
404 for (i = 0, wa = wal->list; i < wal->count; i++, wa++) in guc_mmio_regset_init()
405 ret |= GUC_MCR_REG_ADD(gt, regset, wa->mcr_reg, wa->masked_reg); in guc_mmio_regset_init()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_mem_input.c774 if (dce_mi->wa.single_head_rdreq_dmif_limit) { in dce_mi_allocate_dmif()
776 dce_mi->wa.single_head_rdreq_dmif_limit; in dce_mi_allocate_dmif()
804 if (dce_mi->wa.single_head_rdreq_dmif_limit) { in dce_mi_free_dmif()
806 dce_mi->wa.single_head_rdreq_dmif_limit; in dce_mi_free_dmif()
H A Ddce_mem_input.h430 struct dce_mem_input_wa wa; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c80 if (hws->wa.blnd_crtc_trigger) { in dce_pipe_control_lock()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c853 hws->wa.DEGVIDCN10_253 = true; in dcn10_hwseq_create()
854 hws->wa.false_optc_underflow = true; in dcn10_hwseq_create()
855 hws->wa.DEGVIDCN10_254 = true; in dcn10_hwseq_create()
865 hws->wa.wait_hubpret_read_start_during_mpo_transition = true; in dcn10_hwseq_create()
868 hws->wa.wait_hubpret_read_start_during_mpo_transition = false; in dcn10_hwseq_create()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer_private.h193 struct dce_hwseq_wa wa; member
/linux-6.15/arch/arm/mm/
H A Dcache-l2x0-pmu.c374 L220_PLUS_EVENT_ATTR(wa, 0x9),
/linux-6.15/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_ddc.c151 ddc_service->wa.raw = 0; in ddc_service_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dce110/
H A Ddce110_resource.c570 hws->wa.blnd_crtc_trigger = true; in dce110_hwseq_create()
616 dce_mi->wa.single_head_rdreq_dmif_limit = 3; in dce110_mem_input_create()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn21/
H A Ddcn21_resource.c1177 hws->wa.DEGVIDCN21 = true; in dcn21_hwseq_create()
1178 hws->wa.disallow_self_refresh_during_multi_plane_transition = true; in dcn21_hwseq_create()

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