Home
last modified time | relevance | path

Searched refs:vsync_end (Results 1 – 25 of 215) sorted by relevance

123456789

/linux-6.15/drivers/gpu/drm/panel/
H A Dpanel-simple.c770 .vsync_end = 800 + 3 + 10,
796 .vsync_end = 272 + 2 + 10,
820 .vsync_end = 480 + 2 + 45,
930 .vsync_end = 600 + 16 + 6,
1196 .vsync_end = 768 + 4 + 4,
1444 .vsync_end = 800 + 8 + 2,
1572 .vsync_end = 272 + 8 + 8,
1729 .vsync_end = 768 + 4 + 4,
1914 .vsync_end = 240 + 4 + 4,
1971 .vsync_end = 288 + 2 + 4,
[all …]
H A Dpanel-edp.c1036 .vsync_end = 768 + 4 + 6,
1091 .vsync_end = 768 + 3 + 6,
1114 .vsync_end = 800 + 3 + 5,
1125 .vsync_end = 800 + 3 + 5,
1198 .vsync_end = 1080 + 3 + 6,
1268 .vsync_end = 768 + 8 + 12,
1330 .vsync_end = 1080 + 4 + 4,
1379 .vsync_end = 768 + 5 + 5,
1405 .vsync_end = 2048 + 8 + 4,
1427 .vsync_end = 1536 + 3 + 1,
[all …]
H A Dpanel-arm-versatile.c144 .vsync_end = 240 + 5 + 6,
167 .vsync_end = 480 + 11 + 2,
189 .vsync_end = 220 + 0 + 2,
212 .vsync_end = 320 + 2 + 2,
H A Dpanel-tpo-tpg110.c112 .vsync_end = 480 + 10 + 1,
128 .vsync_end = 480 + 18 + 1,
144 .vsync_end = 272 + 2 + 1,
160 .vsync_end = 640 + 4 + 1,
176 .vsync_end = 240 + 2 + 1,
H A Dpanel-ilitek-ili9322.c544 .vsync_end = 240 + 4 + 1,
557 .vsync_end = 240 + 21 + 1,
571 .vsync_end = 240 + 4 + 1,
585 .vsync_end = 320 + 4 + 1,
598 .vsync_end = 360 + 4 + 1,
612 .vsync_end = 480 + 4 + 1,
626 .vsync_end = 480 + 4 + 1,
H A Dpanel-newvision-nv3052c.c836 .vsync_end = 480 + 5 + 2,
848 .vsync_end = 480 + 5 + 2,
863 .vsync_end = 480 + 12 + 4,
878 .vsync_end = 480 + 21 + 4,
H A Dpanel-sitronix-st7703.c141 .vsync_end = 1440 + 20 + 4,
320 .vsync_end = 1440 + 18 + 10,
407 .vsync_end = 480 + 18 + 2,
491 .vsync_end = 720 + 15 + 3,
577 .vsync_end = 1280 + 16 + 4,
659 .vsync_end = 480 + 17 + 5,
H A Dpanel-novatek-nt35560.c68 .vsync_end = 864 + 14 + 1,
87 .vsync_end = 864 + 1 + 1,
110 .vsync_end = 854 + 14 + 1,
129 .vsync_end = 854 + 1 + 1,
H A Dpanel-leadtek-ltk050h3146w.c306 .vsync_end = 1280 + 9 + 2,
387 .vsync_end = 1280 + 12 + 4,
446 .vsync_end = 1280 + 18 + 4,
H A Dpanel-newvision-nv3051d.c449 .vsync_end = 480 + 18 + 2,
461 .vsync_end = 480 + 18 + 2,
473 .vsync_end = 480 + 18 + 2,
488 .vsync_end = 480 + 18 + 2,
H A Dpanel-innolux-ej030na.c264 .vsync_end = 480 + 102 + 9 + 9,
276 .vsync_end = 480 + 102 + 9,
H A Dpanel-visionox-rm692e5.c249 .vsync_end = 2400 + 16 + 21,
263 .vsync_end = 2400 + 16 + 21,
277 .vsync_end = 2400 + 16 + 21,
H A Dpanel-orisetech-ota5601a.c310 .vsync_end = 480 + 7 + 6,
323 .vsync_end = 480 + 7 + 6,
H A Dpanel-leadtek-ltk500hd1829.c224 .vsync_end = 1280 + 24 + 4,
469 .vsync_end = 1280 + 30 + 4,
/linux-6.15/drivers/gpu/drm/gud/
H A Dgud_internal.h142 dst->vsync_end = cpu_to_le16(src->vsync_end); in gud_from_display_mode()
160 dst->vsync_end = le16_to_cpu(src->vsync_end); in gud_to_display_mode()
/linux-6.15/drivers/gpu/drm/imx/dcss/
H A Ddcss-ss.c125 u16 vsync_start, vsync_end; in dcss_ss_sync_set() local
145 vsync_end = vm->vfront_porch + vm->vsync_len - 1; in dcss_ss_sync_set()
148 ((u32)vsync_end << SYNC_END_POS) | vsync_start, in dcss_ss_sync_set()
/linux-6.15/include/drm/
H A Ddrm_modes.h138 .vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
153 .vsync_end = (vd), .vtotal = (vd), .width_mm = (hd_mm), \
266 u16 vsync_end; member
434 (m)->vdisplay, (m)->vsync_start, (m)->vsync_end, (m)->vtotal, \
/linux-6.15/drivers/gpu/drm/
H A Ddrm_modes.c506 mode->vsync_end = mode->vsync_start + vslen; in fill_analog_mode()
507 mode->vtotal = mode->vsync_end + vbp; in fill_analog_mode()
768 drm_mode->vsync_end = drm_mode->vsync_start + vsync; in drm_cvt_mode()
1082 dmode->vtotal = dmode->vsync_end + vm->vback_porch; in drm_display_mode_from_videomode()
1123 vm->vback_porch = dmode->vtotal - dmode->vsync_end; in drm_display_mode_to_videomode()
1361 p->crtc_vsync_end = p->vsync_end; in drm_mode_set_crtcinfo()
1482 mode1->vsync_end == mode2->vsync_end && in drm_mode_match_timings()
1651 mode->vsync_end < mode->vsync_start || in drm_mode_validate_basic()
1652 mode->vtotal < mode->vsync_end) in drm_mode_validate_basic()
2593 out->vsync_end = in->vsync_end; in drm_mode_convert_to_umode()
[all …]
/linux-6.15/drivers/gpu/drm/msm/dp/
H A Ddp_panel.c341 drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end, in msm_dp_panel_timing_cfg()
343 drm_mode->vsync_end - drm_mode->vsync_start); in msm_dp_panel_timing_cfg()
361 data = drm_mode->vsync_end - drm_mode->vsync_start; in msm_dp_panel_timing_cfg()
408 drm_mode->vtotal - drm_mode->vsync_end, in msm_dp_panel_init_panel_info()
410 drm_mode->vsync_end - drm_mode->vsync_start); in msm_dp_panel_init_panel_info()
H A Ddp_debug.c50 drm_mode->vtotal - drm_mode->vsync_end); in msm_dp_debug_show()
56 drm_mode->vsync_end - drm_mode->vsync_start); in msm_dp_debug_show()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_vrr_regs.h107 #define VRR_VSYNC_END(vsync_end) REG_FIELD_PREP(VRR_VSYNC_END_MASK, (vsync_end)) argument
H A Dintel_vrr.c306 crtc_state->vrr.vsync_end = in intel_vrr_compute_config()
308 crtc_state->hw.adjusted_mode.vsync_end); in intel_vrr_compute_config()
395 VRR_VSYNC_END(crtc_state->vrr.vsync_end) | in intel_vrr_set_transcoder_timings()
545 crtc_state->vrr.vsync_end = in intel_vrr_get_config()
/linux-6.15/drivers/media/platform/xilinx/
H A Dxilinx-vtc.h28 unsigned int vsync_end; member
/linux-6.15/drivers/gpu/drm/bridge/adv7511/
H A Dadv7533.c37 vsw = mode->vsync_end - mode->vsync_start; in adv7511_dsi_config_timing_gen()
39 vbp = mode->vtotal - mode->vsync_end; in adv7511_dsi_config_timing_gen()
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_encoder_phys_vid.c52 || (mode->vtotal < mode->vsync_end) in drm_mode_to_intf_timing_params()
55 || (mode->vsync_end < mode->vsync_start)) { in drm_mode_to_intf_timing_params()
61 mode->vsync_start, mode->vsync_end, in drm_mode_to_intf_timing_params()
81 timing->v_back_porch = mode->vtotal - mode->vsync_end; in drm_mode_to_intf_timing_params()
84 timing->vsync_pulse_width = mode->vsync_end - mode->vsync_start; in drm_mode_to_intf_timing_params()

123456789