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Searched refs:vmx_set_intercept_for_msr (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/arch/x86/kvm/vmx/
H A Dpmu_intel.c633 vmx_set_intercept_for_msr(vcpu, lbr->from + i, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
634 vmx_set_intercept_for_msr(vcpu, lbr->to + i, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
636 vmx_set_intercept_for_msr(vcpu, lbr->info + i, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
639 vmx_set_intercept_for_msr(vcpu, MSR_LBR_SELECT, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
640 vmx_set_intercept_for_msr(vcpu, MSR_LBR_TOS, MSR_TYPE_RW, set); in vmx_update_intercept_for_lbr_msrs()
H A Dvmx.h429 static inline void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, in vmx_set_intercept_for_msr() function
H A Dvmx.c4139 vmx_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW, in vmx_update_msr_bitmap_x2apic()
4157 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_STATUS, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4158 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_BASE, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4159 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4160 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_CR3_MATCH, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4162 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_A + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4163 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_B + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
7923 vmx_set_intercept_for_msr(vcpu, MSR_IA32_XFD_ERR, MSR_TYPE_R, in vmx_vcpu_after_set_cpuid()
7927 vmx_set_intercept_for_msr(vcpu, MSR_IA32_PRED_CMD, MSR_TYPE_W, in vmx_vcpu_after_set_cpuid()
7931 vmx_set_intercept_for_msr(vcpu, MSR_IA32_FLUSH_CMD, MSR_TYPE_W, in vmx_vcpu_after_set_cpuid()