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Searched refs:vlv_dpio_read (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.c730 val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW10(ch)); in chv_set_phy_signal_level()
744 val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW9(ch)); in chv_set_phy_signal_level()
750 val = vlv_dpio_read(dev_priv, phy, VLV_PCS23_DW9(ch)); in chv_set_phy_signal_level()
821 val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW0(ch)); in chv_data_lane_soft_reset()
837 val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW1(ch)); in chv_data_lane_soft_reset()
887 val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW5_CH0); in chv_phy_pre_pll_enable()
895 val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW1_CH1); in chv_phy_pre_pll_enable()
905 val = vlv_dpio_read(dev_priv, phy, VLV_PCS01_DW8(ch)); in chv_phy_pre_pll_enable()
928 val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW19(ch)); in chv_phy_pre_pll_enable()
1039 val = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW5_CH0); in chv_phy_post_pll_disable()
[all …]
H A Dintel_dpll.c530 tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW3(ch)); in vlv_crtc_clock_get()
1897 tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW17(ch)); in vlv_pllb_recal_opamp()
1902 tmp = vlv_dpio_read(dev_priv, phy, VLV_REF_DW11); in vlv_pllb_recal_opamp()
1907 tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW17(ch)); in vlv_pllb_recal_opamp()
1911 tmp = vlv_dpio_read(dev_priv, phy, VLV_REF_DW11); in vlv_pllb_recal_opamp()
1939 tmp = vlv_dpio_read(dev_priv, phy, VLV_PLL_DW16(ch)); in vlv_prepare_pll()
2080 tmp = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW3(ch)); in chv_prepare_pll()
2088 tmp = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW9(ch)); in chv_prepare_pll()
2121 tmp = vlv_dpio_read(dev_priv, phy, CHV_PLL_DW8(ch)); in chv_prepare_pll()
2147 tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW14(ch)); in _chv_enable_pll()
[all …]
H A Dintel_display_power_well.c1461 tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW28); in chv_dpio_cmn_power_well_enable()
1467 tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW6_CH1); in chv_dpio_cmn_power_well_enable()
1476 tmp = vlv_dpio_read(dev_priv, phy, CHV_CMN_DW30); in chv_dpio_cmn_power_well_enable()
1551 val = vlv_dpio_read(dev_priv, phy, reg); in assert_chv_phy_powergate()
/linux-6.15/drivers/gpu/drm/xe/compat-i915-headers/
H A Dvlv_sideband.h83 static inline u32 vlv_dpio_read(struct drm_i915_private *i915, int pipe, int reg) in vlv_dpio_read() function
/linux-6.15/drivers/gpu/drm/i915/
H A Dvlv_sideband.h78 u32 vlv_dpio_read(struct drm_i915_private *i915, enum dpio_phy phy, int reg);
H A Dvlv_sideband.c212 u32 vlv_dpio_read(struct drm_i915_private *i915, enum dpio_phy phy, int reg) in vlv_dpio_read() function