Searched refs:vgic_hcr (Results 1 – 6 of 6) sorted by relevance
27 cpuif->vgic_hcr |= ICH_HCR_EL2_UIE; in vgic_v3_set_underflow()45 cpuif->vgic_hcr &= ~ICH_HCR_EL2_UIE; in vgic_v3_fold_lr_state()293 vgic_v3->vgic_hcr = ICH_HCR_EL2_En; in vgic_v3_enable()302 vgic_v3->vgic_hcr |= (ICH_HCR_EL2_TALL0 | ICH_HCR_EL2_TALL1 | in vcpu_set_ich_hcr()308 vgic_v3->vgic_hcr |= ICH_HCR_EL2_TALL0; in vcpu_set_ich_hcr()310 vgic_v3->vgic_hcr |= ICH_HCR_EL2_TALL1; in vcpu_set_ich_hcr()312 vgic_v3->vgic_hcr |= ICH_HCR_EL2_TC; in vcpu_set_ich_hcr()314 vgic_v3->vgic_hcr |= ICH_HCR_EL2_TDIR; in vcpu_set_ich_hcr()
33 cpuif->vgic_hcr |= GICH_HCR_UIE; in vgic_v2_set_underflow()57 cpuif->vgic_hcr &= ~GICH_HCR_UIE; in vgic_v2_fold_lr_state()270 vcpu->arch.vgic_cpu.vgic_v2.vgic_hcr = GICH_HCR_EN; in vgic_v2_enable()449 writel_relaxed(cpu_if->vgic_hcr, base + GICH_HCR); in vgic_v2_restore_state()
309 val = host_if->vgic_hcr & (ICH_HCR_EL2_TALL0 | ICH_HCR_EL2_TALL1 | in vgic_v3_create_shadow_state()311 s_cpu_if->vgic_hcr = __vcpu_sys_reg(vcpu, ICH_HCR_EL2) | val; in vgic_v3_create_shadow_state()361 val |= (s_cpu_if->vgic_hcr & ICH_HCR_EL2_EOIcount_MASK); in vgic_v3_put_nested()
302 u32 vgic_hcr; member311 u32 vgic_hcr; member
221 write_gicreg(cpu_if->vgic_hcr & ~ICH_HCR_EL2_En, ICH_HCR_EL2); in __vgic_v3_save_state()240 write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2); in __vgic_v3_restore_state()277 if (!(cpu_if->vgic_hcr & ICH_HCR_EL2_En)) { in __vgic_v3_activate_traps()314 write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2); in __vgic_v3_activate_traps()
160 host_cpu_if->vgic_hcr = hyp_cpu_if->vgic_hcr; in sync_hyp_vcpu()