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Searched refs:tg (Results 1 – 25 of 114) sorted by relevance

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/linux-6.15/block/
H A Dblk-throttle.c85 if (tg) in sq_to_td()
147 qn->tg = tg; in throtl_qnode_init()
243 tg = kzalloc_node(sizeof(*tg), gfp, disk->node_id); in throtl_pd_alloc()
244 if (!tg) in throtl_pd_alloc()
256 throtl_qnode_init(&tg->qnode_on_self[rw], tg); in throtl_pd_alloc()
257 throtl_qnode_init(&tg->qnode_on_parent[rw], tg); in throtl_pd_alloc()
271 kfree(tg); in throtl_pd_alloc()
339 kfree(tg); in throtl_pd_free()
366 if (!tg) in update_min_dispatch_time()
1025 if (tg) in throtl_pending_timer_fn()
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H A Dblk-throttle.h33 struct throtl_grp *tg; /* tg this qnode belongs to */ member
160 struct throtl_grp *tg; in blk_should_throtl() local
171 tg = blkg_to_tg(bio->bi_blkg); in blk_should_throtl()
175 blkg_rwstat_add(&tg->stat_bytes, bio->bi_opf, in blk_should_throtl()
178 blkg_rwstat_add(&tg->stat_ios, bio->bi_opf, 1); in blk_should_throtl()
182 if (tg->has_rules_iops[rw]) in blk_should_throtl()
185 if (tg->has_rules_bps[rw] && !bio_flagged(bio, BIO_BPS_THROTTLED)) in blk_should_throtl()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.h117 #define DCE110TG_FROM_TG(tg)\ argument
128 struct timing_generator *tg,
136 struct timing_generator *tg,
154 struct timing_generator *tg,
170 struct timing_generator *tg,
179 struct timing_generator *tg,
185 struct timing_generator *tg,
202 struct timing_generator *tg,
208 struct timing_generator *tg,
212 struct timing_generator *tg,
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H A Ddce110_timing_generator.c66 struct timing_generator *tg, in dce110_timing_generator_apply_front_porch_workaround() argument
146 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true); in dce110_timing_generator_enable_crtc()
217 tg->funcs->wait_for_vblank(tg);
218 tg->funcs->wait_for_vactive(tg);
238 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false); in dce110_timing_generator_disable_crtc()
271 dm_write_reg(tg->ctx, in program_horz_count_by_2()
342 result = tg->bp->funcs->program_crtc_timing(tg->bp, &bp_params); in dce110_timing_generator_program_timing_generator()
590 tg, &position); in dce110_timing_generator_get_crtc_scanoutpos()
1399 tg->funcs->get_position(tg, &position1); in dce110_timing_generator_is_counter_moving()
1400 tg->funcs->get_position(tg, &position2); in dce110_timing_generator_is_counter_moving()
[all …]
H A Ddce110_timing_generator_v.c42 tg->ctx->logger
64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
140 struct timing_generator *tg) in dce110_timing_generator_v_is_in_vertical_blank() argument
242 struct timing_generator *tg, in dce110_timing_generator_v_program_blanking() argument
384 struct timing_generator *tg, in dce110_timing_generator_v_enable_advanced_request() argument
478 struct timing_generator *tg, in dce110_timing_generator_v_set_overscan_color_black() argument
614 struct timing_generator *tg) in dce110_timing_generator_v_did_triggered_reset_occur() argument
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/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dtiming_generator.h222 bool (*enable_crtc)(struct timing_generator *tg);
228 void (*get_position)(struct timing_generator *tg,
233 struct timing_generator *tg,
247 void (*set_blank)(struct timing_generator *tg,
249 bool (*is_blanked)(struct timing_generator *tg);
252 void (*set_colors)(struct timing_generator *tg,
260 void (*unlock)(struct timing_generator *tg);
261 void (*lock)(struct timing_generator *tg);
282 struct timing_generator *tg,
301 void (*tg_init)(struct timing_generator *tg);
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/linux-6.15/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank()
114 tg, in dce120_timing_generator_validate_timing()
174 tg->ctx, in dce120_timing_generator_get_vblank_counter()
190 tg->ctx, in dce120_timing_generator_get_crtc_position()
217 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank()
224 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank()
235 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vactive()
375 tg->ctx, in dce120_timing_generator_did_triggered_reset_occur()
529 tg->ctx, in dce120_timing_generator_set_overscan_color_black()
676 tg->ctx, in dce120_tg_program_blank_color()
[all …]
/linux-6.15/kernel/sched/
H A Dautogroup.h14 struct task_group *tg; member
21 extern void autogroup_free(struct task_group *tg);
23 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument
25 return !!tg->autogroup; in task_group_is_autogroup()
31 autogroup_task_group(struct task_struct *p, struct task_group *tg) in autogroup_task_group() argument
36 if (enabled && task_wants_autogroup(p, tg)) in autogroup_task_group()
37 return p->signal->autogroup->tg; in autogroup_task_group()
39 return tg; in autogroup_task_group()
47 static inline void autogroup_free(struct task_group *tg) { } in autogroup_free() argument
48 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument
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H A Dautogroup.c43 kfree(tg->autogroup); in autogroup_free()
52 ag->tg->rt_se = NULL; in autogroup_destroy()
53 ag->tg->rt_rq = NULL; in autogroup_destroy()
55 sched_release_group(ag->tg); in autogroup_destroy()
56 sched_destroy_group(ag->tg); in autogroup_destroy()
87 struct task_group *tg; in autogroup_create() local
93 if (IS_ERR(tg)) in autogroup_create()
99 ag->tg = tg; in autogroup_create()
108 free_rt_sched_group(tg); in autogroup_create()
112 tg->autogroup = ag; in autogroup_create()
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H A Drt.c195 if (tg->rt_se) in unregister_rt_sched_group()
204 if (tg->rt_rq) in free_rt_sched_group()
206 if (tg->rt_se) in free_rt_sched_group()
223 rt_rq->tg = tg; in init_tg_rt_entry()
248 if (!tg->rt_rq) in alloc_rt_sched_group()
251 if (!tg->rt_se) in alloc_rt_sched_group()
501 tg = list_entry_rcu(tg->list.next, in next_task_group()
506 tg = NULL; in next_task_group()
508 return tg; in next_task_group()
2698 if (tg == d->tg) { in tg_rt_schedulable()
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H A Dext.h83 int scx_tg_online(struct task_group *tg);
84 void scx_tg_offline(struct task_group *tg);
89 void scx_group_set_weight(struct task_group *tg, unsigned long cgrp_weight);
90 void scx_group_set_idle(struct task_group *tg, bool idle);
92 static inline int scx_tg_online(struct task_group *tg) { return 0; } in scx_tg_online() argument
93 static inline void scx_tg_offline(struct task_group *tg) {} in scx_tg_offline() argument
98 static inline void scx_group_set_weight(struct task_group *tg, unsigned long cgrp_weight) {} in scx_group_set_weight() argument
99 static inline void scx_group_set_idle(struct task_group *tg, bool idle) {} in scx_group_set_idle() argument
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_timing_generator.c91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
119 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
125 struct timing_generator *tg, in dce60_timing_generator_enable_advanced_request() argument
131 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request()
134 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request()
175 dm_write_reg(tg->ctx, addr, value); in dce60_timing_generator_enable_advanced_request()
176 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request()
187 value = dm_read_reg(tg->ctx, addr); in dce60_is_tg_enabled()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c109 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes()
118 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes()
419 tg->funcs->read_otg_state(tg, &s); in dcn10_log_hw_state()
1385 tg->funcs->lock(tg); in dcn10_init_pipes()
1387 tg->funcs->lock(tg); in dcn10_init_pipes()
1441 tg->funcs->tg_init(tg); in dcn10_init_pipes()
1453 pipe_ctx->stream_res.tg = tg; in dcn10_init_pipes()
1471 tg->funcs->unlock(tg); in dcn10_init_pipes()
1480 tg->funcs->init_odm(tg); in dcn10_init_pipes()
1483 tg->funcs->tg_init(tg); in dcn10_init_pipes()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn201/
H A Ddcn201_hwseq.c180 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank()
185 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank()
275 if (tg->funcs->is_tg_enabled(tg)) { in dcn201_init_hw()
283 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
284 tg->funcs->lock(tg); in dcn201_init_hw()
310 pipe_ctx->stream_res.tg = tg; in dcn201_init_hw()
336 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw()
337 tg->funcs->unlock(tg); in dcn201_init_hw()
352 tg->funcs->tg_init(tg); in dcn201_init_hw()
547 pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg); in dcn201_pipe_control_lock()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c225 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn35_init_hw()
739 tg->funcs->lock(tg); in dcn35_init_pipes()
741 tg->funcs->lock(tg); in dcn35_init_pipes()
742 tg->funcs->set_blank(tg, true); in dcn35_init_pipes()
795 tg->funcs->tg_init(tg); in dcn35_init_pipes()
807 pipe_ctx->stream_res.tg = tg; in dcn35_init_pipes()
824 if (tg->funcs->is_tg_enabled(tg)) in dcn35_init_pipes()
825 tg->funcs->unlock(tg); in dcn35_init_pipes()
834 tg->funcs->init_odm(tg); in dcn35_init_pipes()
837 tg->funcs->tg_init(tg); in dcn35_init_pipes()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument
91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur()
92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
108 static void program_timing(struct timing_generator *tg, in program_timing() argument
119 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing()
121 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, 0, use_vbios); in program_timing()
125 struct timing_generator *tg, in dce80_timing_generator_enable_advanced_request() argument
129 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce80_timing_generator_enable_advanced_request()
131 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c413 tg->funcs->get_otg_active_size(tg, in dcn20_init_blank()
748 if (tg && tg->funcs->disable_phantom_crtc) in dcn20_disable_plane()
749 tg->funcs->disable_phantom_crtc(tg); in dcn20_disable_plane()
2100 tg->funcs->enable_crtc(tg); in dcn20_program_front_end_for_ctx()
3141 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
3148 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
3149 tg->funcs->lock(tg); in dcn20_fpga_init_hw()
3175 pipe_ctx->stream_res.tg = tg; in dcn20_fpga_init_hw()
3203 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw()
3204 tg->funcs->unlock(tg); in dcn20_fpga_init_hw()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dce/
H A Ddce_hwseq.c56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock()
57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock()
60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock()
71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock()
82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock()
83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
/linux-6.15/drivers/gpu/drm/amd/display/dc/link/accessories/
H A Dlink_dp_cts.c447 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern()
449 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
488 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
824 inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst; in dp_set_test_pattern()
832 pipe_ctx->stream_res.tg); in dp_set_test_pattern()
835 pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
858 pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg); in dp_set_test_pattern()
859 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
861 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
863 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c672 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream() local
690 tg->funcs->set_early_control(tg, early_control); in dce110_enable_stream()
1154 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_disable_stream() local
1781 tg->funcs->disable_vga(tg); in disable_vga_and_power_gate_all_controllers()
2109 if ((tg != NULL) && tg->funcs) { in set_drr()
2659 if (!tg->funcs->is_counter_moving(tg)) { in wait_for_reset_trigger_to_occur()
2664 if (tg->funcs->did_triggered_reset_occur(tg)) { in wait_for_reset_trigger_to_occur()
2673 tg->funcs->wait_for_state(tg, CRTC_STATE_VACTIVE); in wait_for_reset_trigger_to_occur()
2674 tg->funcs->wait_for_state(tg, CRTC_STATE_VBLANK); in wait_for_reset_trigger_to_occur()
2814 tg->funcs->disable_vga(tg); in init_hw()
[all …]
/linux-6.15/drivers/iio/chemical/
H A Dsgp40.c172 struct sgp40_tg_measure tg = {.command = {0x26, 0x0F}}; in sgp40_measure_resistance_raw() local
179 tg.rht_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
180 tg.rht_crc = crc8(sgp40_crc8_table, (u8 *)&tg.rht_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
184 tg.temp_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw()
185 tg.temp_crc = crc8(sgp40_crc8_table, (u8 *)&tg.temp_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw()
189 ret = i2c_master_send(client, (const char *)&tg, sizeof(tg)); in sgp40_measure_resistance_raw()
190 if (ret != sizeof(tg)) { in sgp40_measure_resistance_raw()
191 dev_warn(data->dev, "i2c_master_send ret: %d sizeof: %zu\n", ret, sizeof(tg)); in sgp40_measure_resistance_raw()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_hwseq.c114 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream()
120 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream()
121 pipe_ctx->stream_res.tg, in update_dsc_on_stream()
171 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm()
172 pipe_ctx->stream_res.tg, in dcn314_update_odm()
176 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm()
177 pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); in dcn314_update_odm()
405 pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio()
431 pipe->stream_res.tg->funcs->set_odm_combine( in dcn314_resync_fifo_dccg_dio()
432 pipe->stream_res.tg, in dcn314_resync_fifo_dccg_dio()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c199 if (tg) { in dcn31_init_hw()
200 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn31_init_hw()
201 tg->funcs->get_optc_source(tg, &num_opps, in dcn31_init_hw()
533 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in dcn31_reset_back_end_for_pipe()
534 pipe_ctx->stream_res.tg, in dcn31_reset_back_end_for_pipe()
537 pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); in dcn31_reset_back_end_for_pipe()
539 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); in dcn31_reset_back_end_for_pipe()
646 pipe_ctx[i]->stream_res.tg->funcs->set_static_screen_control(pipe_ctx[i]->stream_res.tg, in dcn31_set_static_screen_control()
678 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn31_set_backlight_level() local
682 if (!abm || !tg || !panel_cntl) in dcn31_set_backlight_level()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c918 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dcn401_enable_stream() local
970 tg->funcs->set_early_control(tg, early_control); in dcn401_enable_stream()
1664 tg = pipe->stream_res.tg; in dcn401_interdependent_update_lock()
1667 !tg->funcs->is_tg_enabled(tg) || in dcn401_interdependent_update_lock()
1676 tg = pipe->stream_res.tg; in dcn401_interdependent_update_lock()
1679 !tg->funcs->is_tg_enabled(tg) || in dcn401_interdependent_update_lock()
1698 tg = pipe->stream_res.tg; in dcn401_interdependent_update_lock()
1700 !tg->funcs->is_tg_enabled(tg) || in dcn401_interdependent_update_lock()
2130 tg->funcs->enable_crtc(tg); in dcn401_program_front_end_for_ctx()
2285 struct timing_generator *tg = pipe->stream_res.tg; in dcn401_post_unlock_program_front_end() local
[all …]
/linux-6.15/arch/powerpc/kernel/
H A Dsmp.c834 tg->property = thread_group_array[i]; in parse_thread_groups()
837 total_threads = tg->nr_groups * tg->threads_per_group; in parse_thread_groups()
842 tg->thread_list[j] = thread_list[j]; in parse_thread_groups()
872 for (i = 0; i < tg->nr_groups; i++) { in get_cpu_thread_group_start()
878 if (tg->thread_list[idx] == hw_cpu_id) in get_cpu_thread_group_start()
892 struct thread_groups *tg = NULL; in get_thread_groups() local
909 tg = &cpu_tgl->property_tgs[i]; in get_thread_groups()
914 if (!tg) in get_thread_groups()
918 return tg; in get_thread_groups()
948 struct thread_groups *tg = NULL; in init_thread_group_cache_map() local
[all …]

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