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/linux-6.15/arch/riscv/lib/
H A Dmemmove.S53 add t4, a0, a2
197 addi t4, t4, (-2 * SZREG)
245 addi t4, t4, -SZREG
272 beq t4, t6, 2f
276 addi t4, t4, -1
277 sb t1, 0(t4)
278 bne t4, t6, 1b
291 beq t3, t4, 2f
297 bne t3, t4, 1b
302 beq t4, t3, 2f
[all …]
H A Dstrncmp.S72 add t4, a0, a2
76 andi t6, t4, -SZREG
121 bge a0, t4, 5f
H A Duaccess.S95 fixup REG_L t4, 7*SZREG(a1), 10f
103 fixup REG_S t4, 7*SZREG(a0), 10f
138 sub t4, a5, t3
155 sll a2, a5, t4
/linux-6.15/arch/alpha/lib/
H A Dev67-strrchr.S36 insbl a1, 1, t4 # U : 000000000000ch00
41 or t2, t4, a1 # E : 000000000000chch
48 sll a1, 48, t4 # U : chch000000000000
50 or t4, a1, a1 # E : chch00000000chch
56 mskqh t5, a0, t4 # E : Complete garbage mask
58 cmpbge zero, t4, t4 # E : bits set iff byte is garbage
61 andnot t1, t4, t1 # E : clear garbage from null test
62 andnot t3, t4, t3 # E : clear garbage from char test
84 negq t1, t4 # E : isolate first null byte match
85 and t1, t4, t4 # E :
[all …]
H A Dstrrchr.S31 lda t4, -1 # .. e1 : build garbage mask
34 mskqh t4, a0, t4 # e0 :
37 cmpbge zero, t4, t4 # .. e1 : bits set iff byte is garbage
39 andnot t1, t4, t1 # .. e1 : clear garbage from null test
40 andnot t3, t4, t3 # e0 : clear garbage from char test
56 negq t1, t4 # e0 : isolate first null byte match
57 and t1, t4, t4 # e1 :
58 subq t4, 1, t5 # e0 : build a mask of the bytes up to...
59 or t4, t5, t4 # e1 : ... and including the null
61 and t3, t4, t3 # e0 : mask out char matches after null
H A Dstrchr.S27 lda t4, -1 # .. e1 : build garbage mask
30 mskqh t4, a0, t4 # e0 :
33 cmpbge zero, t4, t4 # .. e1 : bits set iff byte is garbage
38 andnot t0, t4, t0 # e0 : clear garbage bits
58 and t0, 0xaa, t4 # e0 :
61 cmovne t4, 1, t4 # .. e1 :
63 addq v0, t4, v0 # .. e1 :
H A Dev67-strchr.S40 lda t4, -1 # E : build garbage mask
42 mskqh t4, a0, t4 # U : only want relevant part of first quad
50 cmpbge zero, t4, t4 # E : bits set iff byte is garbage
58 andnot t0, t4, t0 # E : clear garbage bits
H A Dstxcpy.S136 extqh t2, a1, t4 # e0 :
138 or t1, t4, t1 # .. e1 :
238 and a0, 7, t4 # .. e1 : find dest misalignment
246 beq t4, 1f # .. e1 :
251 subq a1, t4, a1 # .. e1 : sub dest misalignment from src addr
256 cmplt t4, t5, t12 # e0 :
H A Dstxncpy.S161 extqh t2, a1, t4 # e0 :
162 or t1, t4, t1 # e1 : first aligned src word complete
295 and a0, 7, t4 # .. e1 : find dest misalignment
303 beq t4, 1f # .. e1 :
307 subq a1, t4, a1 # .. e1 : sub dest misalignment from src addr
312 1: cmplt t4, t5, t12 # e1 :
333 mskqh t1, t4, t1 # e0 :
/linux-6.15/arch/x86/crypto/
H A Dcamellia-aesni-avx2-asm_64.S76 vpshufb t4, x0, x0; \
77 vpshufb t4, x7, x7; \
78 vpshufb t4, x3, x3; \
79 vpshufb t4, x6, x6; \
80 vpshufb t4, x2, x2; \
81 vpshufb t4, x5, x5; \
82 vpshufb t4, x1, x1; \
83 vpshufb t4, x4, x4; \
100 vpxor t4##_x, t4##_x, t4##_x; \
170 vpshufb t7, t4, t4; \
[all …]
H A Dcamellia-aesni-avx-asm_64.S62 vpshufb t4, x0, x0; \
63 vpshufb t4, x7, x7; \
64 vpshufb t4, x1, x1; \
65 vpshufb t4, x4, x4; \
66 vpshufb t4, x2, x2; \
67 vpshufb t4, x5, x5; \
68 vpshufb t4, x3, x3; \
69 vpshufb t4, x6, x6; \
82 vpxor t4, t4, t4; \
128 vpshufb t6, t4, t4; \
[all …]
/linux-6.15/arch/arm/crypto/
H A Dsha256-armv4.pl51 $inp="r1"; $t4="r1";
144 @ ldr $t4,[sp,#`($i+14)%16`*4]
147 mov $t2,$t4,ror#$sigma1[0]
149 eor $t2,$t2,$t4,ror#$sigma1[1]
153 ldr $t4,[sp,#`($i+9)%16`*4]
159 add $t1,$t1,$t4 @ X[i]
293 my $Xfer=$t4;
549 ldr $t4,[$t1,#12]
556 add $D,$D,$t4
557 ldr $t4,[$t1,#28]
[all …]
H A Daes-cipher-core.S42 .macro __hround, out0, out1, in0, in1, in2, in3, t3, t4, enc, sz, op, oldcpsr
65 __select \t4, \in0, 3
68 __select \t4, \in2, 3
72 __load \t4, \t4, 3, \sz, \op
87 eor \out1, \out1, \t4, ror #8
/linux-6.15/lib/zlib_dfltcc/
H A Ddfltcc_util.h42 const Byte *t4 = op2 ? *op2 : NULL; in dfltcc() local
48 register const Byte *r4 __asm__("r4") = t4; in dfltcc()
64 t2 = r2; t3 = r3; t4 = r4; t5 = r5; in dfltcc()
95 *op2 = t4; in dfltcc()
/linux-6.15/arch/arm64/lib/
H A Dcrc-t10dif-core.S82 t4 .req v18
153 ext \b64\().16b, t4.16b, t4.16b, #15
161 pmull t4.8h, t7.8b, t6.8b
166 eor t4.16b, t4.16b, t6.16b
168 ext t6.16b, t4.16b, t4.16b, #8
171 eor t4.8b, t4.8b, t6.8b
/linux-6.15/arch/x86/include/asm/
H A Dsyscall_wrapper.h63 #define SYSCALL_PT_ARG6(m, t1, t2, t3, t4, t5, t6) \ argument
64 SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5), m(t6, (regs->bp))
65 #define SYSCALL_PT_ARG5(m, t1, t2, t3, t4, t5) \ argument
66 SYSCALL_PT_ARG4(m, t1, t2, t3, t4), m(t5, (regs->di))
67 #define SYSCALL_PT_ARG4(m, t1, t2, t3, t4) \ argument
68 SYSCALL_PT_ARG3(m, t1, t2, t3), m(t4, (regs->si))
/linux-6.15/arch/mips/lib/
H A Dcsum_partial.S33 #define t4 $12 macro
193 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
194 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
195 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
196 CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
476 LOAD(t4, UNIT(4)(src))
490 STORE(t4, UNIT(4)(dst))
491 ADDC(t4, t5)
493 ADDC(sum, t4)
593 SLL t4, t1, 3 # t4 = number of bits to discard
[all …]
/linux-6.15/arch/loongarch/mm/
H A Dpage.S48 ld.d t4, a1, 32
61 st.d t4, a0, 32
63 ld.d t4, a1, 96
76 st.d t4, a0, -32
/linux-6.15/arch/riscv/include/asm/
H A Dcompat.h68 compat_ulong_t t4; member
105 cregs->t4 = (compat_ulong_t) regs->t4; in regs_to_cregs()
142 regs->t4 = (unsigned long) cregs->t4; in cregs_to_regs()
/linux-6.15/arch/riscv/kernel/
H A Dcrash_save_regs.S42 REG_S t4, PT_T4(a0) /* x29 */
49 csrr t4, CSR_CAUSE
54 REG_S t4, PT_CAUSE(a0)
H A Dmcount.S84 la t4, ftrace_stub
88 bne t1, t4, .Ldo_ftrace_graph_caller
97 bne t5, t4, .Ldo_trace
/linux-6.15/scripts/
H A Dmakelst27 t4=`field 1 $t3`
29 t6=`printf "%lu" $((0x$t4 - 0x$t5))`
/linux-6.15/arch/s390/include/asm/
H A Dstacktrace.h124 #define CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4) \ argument
126 long arg4 = (long)(t4)(a4)
127 #define CALL_LARGS_5(t1, a1, t2, a2, t3, a3, t4, a4, t5, a5) \ argument
128 CALL_LARGS_4(t1, a1, t2, a2, t3, a3, t4, a4); \
/linux-6.15/arch/sparc/lib/
H A Dblockops.S28 #define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3, t4, t5, t6, t7) \ argument
31 ldd [src + offset + 0x08], t4; \
35 std t4, [dst + offset + 0x08]; \
/linux-6.15/arch/mips/kernel/
H A Dscall32-o32.S50 addu t4, t0, 32
51 bltz t4, bad_stack # -> sp is bad
195 lw t4, 20(sp)
198 sw t4, 16(sp)

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