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Searched refs:speedbin (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/cpufreq/
H A Dqcom-cpufreq-nvmem.c77 u8 *speedbin; in qcom_cpufreq_simple_get_version() local
81 if (IS_ERR(speedbin)) in qcom_cpufreq_simple_get_version()
86 kfree(speedbin); in qcom_cpufreq_simple_get_version()
175 u8 *speedbin; in qcom_cpufreq_kryo_name_version() local
212 kfree(speedbin); in qcom_cpufreq_kryo_name_version()
222 u8 *speedbin; in qcom_cpufreq_krait_name_version() local
251 kfree(speedbin); in qcom_cpufreq_krait_name_version()
262 u8 *speedbin; in qcom_cpufreq_ipq8064_name_version() local
306 kfree(speedbin); in qcom_cpufreq_ipq8064_name_version()
317 u8 *speedbin; in qcom_cpufreq_ipq6018_name_version() local
[all …]
H A Dsun50i-cpufreq-nvmem.c31 u32 (*efuse_xlate)(u32 speedbin);
34 static u32 sun50i_h6_efuse_xlate(u32 speedbin) in sun50i_h6_efuse_xlate() argument
38 efuse_value = (speedbin >> NVMEM_SHIFT) & NVMEM_MASK; in sun50i_h6_efuse_xlate()
51 static u32 sun50i_a100_efuse_xlate(u32 speedbin) in sun50i_a100_efuse_xlate() argument
82 static u32 sun50i_h616_efuse_xlate(u32 speedbin) in sun50i_h616_efuse_xlate() argument
87 switch (speedbin & 0xffff) { in sun50i_h616_efuse_xlate()
119 speedbin & 0xffff); in sun50i_h616_efuse_xlate()
198 u32 speedbin = 0; in sun50i_cpufreq_get_efuse() local
228 memcpy(&speedbin, speedbin_ptr, len); in sun50i_cpufreq_get_efuse()
229 speedbin = le32_to_cpu(speedbin); in sun50i_cpufreq_get_efuse()
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/linux-6.15/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml20 defines the voltage and frequency value based on the speedbin blown in
37 speedbin that is used to select the right frequency/voltage
58 0: MSM8996, speedbin 0
59 1: MSM8996, speedbin 1
60 2: MSM8996, speedbin 2
61 3: MSM8996, speedbin 3
64 Bitmap for MSM8996SG format (speedbin shifted of 4 left):
66 4: MSM8996SG, speedbin 0
67 5: MSM8996SG, speedbin 1
68 6: MSM8996SG, speedbin 2
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H A Dallwinner,sun50i-h6-operating-points.yaml17 on the speedbin blown in the efuse combination.
32 register that has information about the speedbin that is used
/linux-6.15/drivers/gpu/drm/msm/adreno/
H A Dadreno_gpu.c336 *value |= ((uint64_t) adreno_gpu->speedbin) << 32; in adreno_get_param()
1093 int adreno_read_speedbin(struct device *dev, u32 *speedbin) in adreno_read_speedbin() argument
1095 return nvmem_cell_read_variable_le_u32(dev, "speed_bin", speedbin); in adreno_read_speedbin()
1107 u32 speedbin; in adreno_gpu_init() local
1135 if (adreno_read_speedbin(dev, &speedbin) || !speedbin) in adreno_gpu_init()
1136 speedbin = 0xffff; in adreno_gpu_init()
1137 adreno_gpu->speedbin = (uint16_t) (0xffff & speedbin); in adreno_gpu_init()
H A Dadreno_gpu.h83 uint16_t speedbin; member
178 uint16_t speedbin; member
637 int adreno_read_speedbin(struct device *dev, u32 *speedbin);
H A Da6xx_gpu.c2326 return BIT(info->speedbins[i].speedbin); in fuse_to_supp_hw()
2334 u32 speedbin; in a6xx_set_supported_hw() local
2337 ret = adreno_read_speedbin(dev, &speedbin); in a6xx_set_supported_hw()
2350 supp_hw = fuse_to_supp_hw(info, speedbin); in a6xx_set_supported_hw()
2355 speedbin); in a6xx_set_supported_hw()
/linux-6.15/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi134 /* Higher CPU frequencies need speedbin support */
H A Dqcom-ipq8064.dtsi380 speedbin_efuse: speedbin@c0 {
/linux-6.15/arch/arm64/boot/dts/qcom/
H A Dqcs404.dtsi376 cpr_efuse_speedbin: speedbin@13c {
H A Dmsm8996.dtsi769 speedbin_efuse: speedbin@133 {
/linux-6.15/arch/arm64/boot/dts/mediatek/
H A Dmt8186.dtsi1723 gpu_speedbin: gpu-speedbin@59c {
H A Dmt8188.dtsi2181 gpu_speedbin: gpu-speedbin@581 {