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Searched refs:socclk_khz (Results 1 – 25 of 28) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c275 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) { in dcn2_update_clocks()
276 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn2_update_clocks()
278 …_smu->set_hard_min_socclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.socclk_khz)); in dcn2_update_clocks()
366 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr->clks.socclk_khz)) { in dcn2_update_clocks_fpga()
367 clk_mgr->clks.socclk_khz = new_clocks->socclk_khz; in dcn2_update_clocks_fpga()
480 else if (a->socclk_khz != b->socclk_khz) in dcn2_are_clock_states_equal()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c130 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks()
131 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn201_update_clocks()
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c196 context->bw_ctx.bw.dcn.clk.socclk_khz); in context_clock_trace()
204 context->bw_ctx.bw.dcn.clk.socclk_khz); in context_clock_trace()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c244 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn3_update_clocks()
246 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn3_update_clocks()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_types.h365 unsigned long socclk_khz; member
396 unsigned long socclk_khz; member
/linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_trace.h498 __field(int, socclk_khz)
516 __entry->socclk_khz = clk->socclk_khz;
541 __entry->socclk_khz,
/linux-6.15/drivers/gpu/drm/amd/display/dc/inc/
H A Ddcn_calcs.h631 int *socclk_khz);
643 int socclk_khz);
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.h64 unsigned int socclk_khz; member
H A Ddml2_utils.c189 context->bw_ctx.bw.dcn.clk.socclk_khz = out_clks->socclk_khz; in dml2_copy_clocks_to_dc_state()
H A Ddml2_wrapper.c596 …out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].so… in dml2_validate_and_build_resource()
654 …out_clks.socclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].so… in dml2_validate_and_build_resource()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c692 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn32_update_clocks()
694 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn32_update_clocks()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c1114 new_clocks->socclk_khz = 400000; in dcn35_update_clocks_fpga()
1133 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr->clks.socclk_khz)) { in dcn35_update_clocks_fpga()
1134 clk_mgr->clks.socclk_khz = new_clocks->socclk_khz; in dcn35_update_clocks_fpga()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c857 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn401_build_update_bandwidth_clocks_sequence()
859 clk_mgr_base->clks.socclk_khz = new_clocks->socclk_khz; in dcn401_build_update_bandwidth_clocks_sequence()
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn10/
H A Ddcn10_resource.c1317 int min_fclk_khz, min_dcfclk_khz, socclk_khz; in dcn10_resource_construct() local
1538 dc, &min_fclk_khz, &min_dcfclk_khz, &socclk_khz); in dcn10_resource_construct()
1541 dc, min_fclk_khz, min_dcfclk_khz, socclk_khz); in dcn10_resource_construct()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1360 int *socclk_khz) in dcn_get_soc_clks() argument
1364 *socclk_khz = dc->dcn_soc->socclk * 1000; in dcn_get_soc_clks()
1371 int socclk_khz) in dcn_bw_notify_pplib_of_wm_ranges() argument
1398 ranges.writer_wm_sets[0].min_fill_clk_mhz = socclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c531 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_log_hw_state()
3122 int min_fclk_khz, min_dcfclk_khz, socclk_khz; in dcn10_prepare_bandwidth() local
3144 dc, &min_fclk_khz, &min_dcfclk_khz, &socclk_khz); in dcn10_prepare_bandwidth()
3147 dc, min_fclk_khz, min_dcfclk_khz, socclk_khz); in dcn10_prepare_bandwidth()
3160 int min_fclk_khz, min_dcfclk_khz, socclk_khz; in dcn10_optimize_bandwidth() local
3183 dc, &min_fclk_khz, &min_dcfclk_khz, &socclk_khz); in dcn10_optimize_bandwidth()
3186 dc, min_fclk_khz, min_dcfclk_khz, socclk_khz); in dcn10_optimize_bandwidth()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/
H A Ddml2_internal_shared_types.h200 unsigned int socclk_khz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c656 in_out->programming->min_clocks.dcn4x.socclk_khz = mode_support_result->global.socclk_khz; in map_mode_to_soc_dpm()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c483 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz); in dcn10_get_clock_states()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c1088 …context->bw_ctx.bw.dcn.clk.socclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c565 context->bw_ctx.bw.dcn.clk.socclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4.c433 …in_out->mode_support_result.global.socclk_khz = (unsigned int)(core->clean_me_up.mode_lib.ms.SOCCL… in core_dcn4_mode_support()
/linux-6.15/drivers/gpu/drm/amd/display/dc/
H A Ddc.h601 int socclk_khz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c753 clocks->socclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].socclk_mhz * 1000; in dcn32_initialize_min_clocks()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1658 context->bw_ctx.bw.dcn.clk.socclk_khz = context->bw_ctx.dml.vba.SOCCLK * 1000; in dcn32_calculate_dlg_params()
1765 context->bw_ctx.bw.dcn.clk.socclk_khz = 0; in dcn32_calculate_dlg_params()

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