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Searched refs:smu_dpm_clks (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c514 smu_dpm_clks->mc_address.high_part); in dcn31_get_dpm_table_from_smu()
516 smu_dpm_clks->mc_address.low_part); in dcn31_get_dpm_table_from_smu()
711 &smu_dpm_clks.mc_address.quad_part); in dcn31_clk_mgr_construct()
713 if (smu_dpm_clks.dpm_clks == NULL) { in dcn31_clk_mgr_construct()
714 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn31_clk_mgr_construct()
715 smu_dpm_clks.mc_address.quad_part = 0; in dcn31_clk_mgr_construct()
718 ASSERT(smu_dpm_clks.dpm_clks); in dcn31_clk_mgr_construct()
762 smu_dpm_clks.dpm_clks->MinGfxClk, in dcn31_clk_mgr_construct()
793 smu_dpm_clks.dpm_clks); in dcn31_clk_mgr_construct()
797 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn31_clk_mgr_construct()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c475 smu_dpm_clks->mc_address.high_part); in dcn315_get_dpm_table_from_smu()
477 smu_dpm_clks->mc_address.low_part); in dcn315_get_dpm_table_from_smu()
642 &smu_dpm_clks.mc_address.quad_part); in dcn315_clk_mgr_construct()
644 if (smu_dpm_clks.dpm_clks == NULL) { in dcn315_clk_mgr_construct()
645 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn315_clk_mgr_construct()
646 smu_dpm_clks.mc_address.quad_part = 0; in dcn315_clk_mgr_construct()
649 ASSERT(smu_dpm_clks.dpm_clks); in dcn315_clk_mgr_construct()
689 smu_dpm_clks.dpm_clks->MinGfxClk, in dcn315_clk_mgr_construct()
721 smu_dpm_clks.dpm_clks); in dcn315_clk_mgr_construct()
725 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn315_clk_mgr_construct()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c578 smu_dpm_clks->mc_address.high_part); in dcn314_get_dpm_table_from_smu()
580 smu_dpm_clks->mc_address.low_part); in dcn314_get_dpm_table_from_smu()
821 &smu_dpm_clks.mc_address.quad_part); in dcn314_clk_mgr_construct()
823 if (smu_dpm_clks.dpm_clks == NULL) { in dcn314_clk_mgr_construct()
824 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn314_clk_mgr_construct()
825 smu_dpm_clks.mc_address.quad_part = 0; in dcn314_clk_mgr_construct()
828 ASSERT(smu_dpm_clks.dpm_clks); in dcn314_clk_mgr_construct()
871 smu_dpm_clks.dpm_clks->MinGfxClk, in dcn314_clk_mgr_construct()
903 smu_dpm_clks.dpm_clks); in dcn314_clk_mgr_construct()
907 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn314_clk_mgr_construct()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c833 smu_dpm_clks->mc_address.high_part); in dcn35_get_dpm_table_from_smu()
835 smu_dpm_clks->mc_address.low_part); in dcn35_get_dpm_table_from_smu()
850 smu_dpm_clks->mc_address.high_part); in dcn351_get_dpm_table_from_smu()
852 smu_dpm_clks->mc_address.low_part); in dcn351_get_dpm_table_from_smu()
1287 &smu_dpm_clks.mc_address.quad_part); in dcn35_clk_mgr_construct()
1288 if (smu_dpm_clks.dpm_clks == NULL) { in dcn35_clk_mgr_construct()
1289 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn35_clk_mgr_construct()
1292 ASSERT(smu_dpm_clks.dpm_clks); in dcn35_clk_mgr_construct()
1391 smu_dpm_clks.dpm_clks); in dcn35_clk_mgr_construct()
1395 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn35_clk_mgr_construct()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c642 struct smu_dpm_clks *smu_dpm_clks) in vg_get_dpm_table_from_smu() argument
655 smu_dpm_clks->mc_address.high_part); in vg_get_dpm_table_from_smu()
657 smu_dpm_clks->mc_address.low_part); in vg_get_dpm_table_from_smu()
667 struct smu_dpm_clks smu_dpm_clks = { 0 }; in vg_clk_mgr_construct() local
699 &smu_dpm_clks.mc_address.quad_part); in vg_clk_mgr_construct()
701 if (smu_dpm_clks.dpm_clks == NULL) { in vg_clk_mgr_construct()
702 smu_dpm_clks.dpm_clks = &dummy_clocks; in vg_clk_mgr_construct()
706 ASSERT(smu_dpm_clks.dpm_clks); in vg_clk_mgr_construct()
738 smu_dpm_clks.dpm_clks); in vg_clk_mgr_construct()
741 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in vg_clk_mgr_construct()
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H A Ddcn301_smu.h124 struct smu_dpm_clks { struct
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c427 struct dcn316_smu_dpm_clks *smu_dpm_clks) in dcn316_get_dpm_table_from_smu() argument
440 smu_dpm_clks->mc_address.high_part); in dcn316_get_dpm_table_from_smu()
442 smu_dpm_clks->mc_address.low_part); in dcn316_get_dpm_table_from_smu()
616 &smu_dpm_clks.mc_address.quad_part); in dcn316_clk_mgr_construct()
618 if (smu_dpm_clks.dpm_clks == NULL) { in dcn316_clk_mgr_construct()
619 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn316_clk_mgr_construct()
620 smu_dpm_clks.mc_address.quad_part = 0; in dcn316_clk_mgr_construct()
623 ASSERT(smu_dpm_clks.dpm_clks); in dcn316_clk_mgr_construct()
664 smu_dpm_clks.dpm_clks); in dcn316_clk_mgr_construct()
668 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn316_clk_mgr_construct()
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