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/linux-6.15/net/sunrpc/auth_gss/
H A Dgss_krb5_wrap.c74 int shifted = 0; in _rotate_left() local
78 while (shifted < shift) { in _rotate_left()
79 this_shift = min(shift - shifted, LOCAL_BUF_LEN); in _rotate_left()
81 shifted += this_shift; in _rotate_left()
/linux-6.15/arch/arm/nwfpe/
H A Dsoftfloat-macros35 bits are shifted off, they are ``jammed'' into the least significant bit of
60 bits are shifted off, they are ``jammed'' into the least significant bit of
88 _plus_ the number of bits given in `count'. The shifted result is at most
90 bits shifted off form a second 64-bit result as follows: The _last_ bit
91 shifted off is the most-significant bit of the extra result, and the other
97 value is shifted right by the number of bits given in `count', and the
135 number of bits given in `count'. Any bits shifted off are lost. The value
212 by 64 _plus_ the number of bits given in `count'. The shifted result is
215 off form a third 64-bit result as follows: The _last_ bit shifted off is
222 fixed-point value is shifted right by the number of bits given in `count',
[all …]
/linux-6.15/Documentation/driver-api/
H A Dspi.rst9 duplex protocol; for each bit shifted out the MOSI line (one per clock)
10 another is shifted in on the MISO line. Those bits are assembled into
/linux-6.15/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml132 Contains the manufacturer ID left-shifted by 1.
137 Contains the ORing of the part ID left-shifted by 16,
138 the instance ID left-shifted by 12 and extra information.
/linux-6.15/drivers/media/rc/
H A Dserial_ir.c182 unsigned char chunk, shifted; in send_pulse_irdeo() local
191 shifted = chunk << (i * 3); in send_pulse_irdeo()
192 shifted >>= 1; in send_pulse_irdeo()
193 output &= (~shifted); in send_pulse_irdeo()
/linux-6.15/arch/arm/mm/
H A Dcache-v7.S52 mov r3, r3, lsl r1 @ NumWays-1 shifted into bits [31:...]
53 movs r1, r2, lsl r1 @ #1 shifted left by same amount
158 movne r4, r4, lsl r5 @ # of ways shifted into bits [31:...]
159 movne r6, r6, lsl r5 @ 1 shifted left by same amount
/linux-6.15/Documentation/devicetree/bindings/rtc/
H A Depson,rx6110.txt28 - spi-cpha: RX6110 works with SPI shifted clock phase
H A Drtc.yaml39 shifted so the first usable year is the specified one.
/linux-6.15/Documentation/ABI/testing/
H A Dsysfs-driver-hid-prodikeys26 The octave can be shifted via software up/down 2 octaves.
/linux-6.15/sound/soc/cirrus/
H A DKconfig25 state machine and the whole stream can be shifted by one byte
/linux-6.15/arch/m68k/fpsp040/
H A Dsgetem.S109 | shifted bits in d0 and d1
134 | ;be shifted into ms mant
H A Dround.S375 | ;be shifted into ms mant
445 | ; shifted off in denorm routine)
458 | ; shifted off in denorm routine)
/linux-6.15/Documentation/devicetree/bindings/bus/
H A Dmoxtet.txt8 - spi-cpha : Required shifted clock phase
/linux-6.15/arch/powerpc/lib/
H A Ddiv64.S39 divwu r11,r11,r9 # then we divide the shifted quantities
/linux-6.15/Documentation/devicetree/bindings/gpio/
H A Dfairchild,74hc595.yaml14 After the bits are shifted into the shift register, CS# is driven high, which
/linux-6.15/Documentation/i2c/
H A Dslave-interface.rst113 only means that the previous byte is shifted out to the bus! To ensure seamless
115 still shifted out. If the master sends NACK and stops reading after the byte
116 currently shifted out, this byte requested here is never used. It very likely
/linux-6.15/arch/sh/kernel/
H A Dentry-common.S262 * Note: When we're first called, the TRA value must be shifted
/linux-6.15/Documentation/devicetree/bindings/mux/
H A Dreg-mux.yaml32 - description: pre-shifted bitfield mask
/linux-6.15/Documentation/devicetree/bindings/i2c/
H A Dopencores,i2c-ocores.yaml59 device register offsets are shifted by this value
/linux-6.15/Documentation/driver-api/media/drivers/
H A Dcx88-devel.rst88 Bits are then right shifted into the GP_SAMPLE register at the specified
/linux-6.15/arch/powerpc/boot/
H A Ddiv64.S39 divwu r11,r11,r9 # then we divide the shifted quantities
/linux-6.15/Documentation/input/devices/
H A Drotary-encoder.rst11 peripherals with two wires. The outputs are phase-shifted by 90 degrees
/linux-6.15/arch/parisc/kernel/
H A Dperf_asm.S86 ;* is shifted shifted backup immediately. This is to compensate
/linux-6.15/Documentation/devicetree/bindings/spi/
H A Dspi-controller.yaml128 The device requires shifted clock phase (CPHA) mode.
/linux-6.15/Documentation/staging/
H A Dcrc32.rst53 Notice how, to get at bit 32 of the shifted remainder, we look
167 in parallel. Each step, the 32-bit CRC is shifted 64 bits and XORed

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